JPH0375503U - - Google Patents
Info
- Publication number
- JPH0375503U JPH0375503U JP13534089U JP13534089U JPH0375503U JP H0375503 U JPH0375503 U JP H0375503U JP 13534089 U JP13534089 U JP 13534089U JP 13534089 U JP13534089 U JP 13534089U JP H0375503 U JPH0375503 U JP H0375503U
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- electrodes
- recess
- pair
- top surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Description
第１図は本考案の一実施例に係るチツプ抵抗を
プリント配線板に実装した状態を示す断面図、第
２図は従来一般のチツプ抵抗をプリント配線板に
実装した状態を示す断面図である。
１……チツプ抵抗、２……セラミツク基板（絶
縁基板）、３，４……電極、９……抵抗体、１１
……プリント配線板、１２，１３……ランド、１
４，１５……はんだフイレツト、１６……凹所、
１６ａ，１６ｂ……内壁面。
FIG. 1 is a sectional view showing a chip resistor according to an embodiment of the present invention mounted on a printed wiring board, and FIG. 2 is a sectional view showing a conventional chip resistor mounted on a printed wiring board. . 1... Chip resistor, 2... Ceramic substrate (insulating substrate), 3, 4... Electrode, 9... Resistor, 11
...Printed wiring board, 12, 13...Land, 1
4, 15...Solder fillet, 16...Recess,
16a, 16b...Inner wall surface.
Claims (1)
および底面に至る一対の電極と、該絶縁基板の天
面でこれら両電極間に連結する抵抗体とを備え、
プリント配線板に面実装されるチツプ抵抗におい
て、上記絶縁基板の底面の略中央部に凹所を設け
、該凹所の相対向する内壁面にそれぞれ上記一対
の電極を延設したことを特徴とするチツプ抵抗。 comprising an insulating substrate, a pair of electrodes that hug the sides of the insulating substrate and reach a top surface and a bottom surface, and a resistor connected between these two electrodes on the top surface of the insulating substrate,
A chip resistor that is surface-mounted on a printed wiring board, characterized in that a recess is provided at approximately the center of the bottom surface of the insulating substrate, and the pair of electrodes are extended on opposing inner wall surfaces of the recess. chip resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13534089U JPH062243Y2 (en) | 1989-11-24 | 1989-11-24 | Chip resistance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13534089U JPH062243Y2 (en) | 1989-11-24 | 1989-11-24 | Chip resistance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0375503U true JPH0375503U (en) | 1991-07-29 |
| JPH062243Y2 JPH062243Y2 (en) | 1994-01-19 |
Family
ID=31682613
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13534089U Expired - Lifetime JPH062243Y2 (en) | 1989-11-24 | 1989-11-24 | Chip resistance |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH062243Y2 (en) |
-
1989
- 1989-11-24 JP JP13534089U patent/JPH062243Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH062243Y2 (en) | 1994-01-19 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |