JPH0369446B2 - - Google Patents

Info

Publication number
JPH0369446B2
JPH0369446B2 JP59106833A JP10683384A JPH0369446B2 JP H0369446 B2 JPH0369446 B2 JP H0369446B2 JP 59106833 A JP59106833 A JP 59106833A JP 10683384 A JP10683384 A JP 10683384A JP H0369446 B2 JPH0369446 B2 JP H0369446B2
Authority
JP
Japan
Prior art keywords
circuit
input terminal
signal
type flip
flop circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59106833A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60249415A (ja
Inventor
Takashi Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59106833A priority Critical patent/JPS60249415A/ja
Publication of JPS60249415A publication Critical patent/JPS60249415A/ja
Publication of JPH0369446B2 publication Critical patent/JPH0369446B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
JP59106833A 1984-05-25 1984-05-25 パルス発生回路 Granted JPS60249415A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59106833A JPS60249415A (ja) 1984-05-25 1984-05-25 パルス発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59106833A JPS60249415A (ja) 1984-05-25 1984-05-25 パルス発生回路

Publications (2)

Publication Number Publication Date
JPS60249415A JPS60249415A (ja) 1985-12-10
JPH0369446B2 true JPH0369446B2 (enrdf_load_stackoverflow) 1991-11-01

Family

ID=14443731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59106833A Granted JPS60249415A (ja) 1984-05-25 1984-05-25 パルス発生回路

Country Status (1)

Country Link
JP (1) JPS60249415A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS60249415A (ja) 1985-12-10

Similar Documents

Publication Publication Date Title
US5087835A (en) Positive edge triggered synchronized pulse generator
US4939384A (en) Flip-flop circuit
US5448597A (en) Clock signal switching circuit
EP0219846B1 (en) Latch circuit tolerant of undefined control signals
US4786823A (en) Noise pulse suppressing circuit in digital system
JPH0763135B2 (ja) 半導体集積論理回路
JPS6179318A (ja) フリツプフロツプ回路
EP0511423A1 (en) Electrical circuit for generating pulse strings
US5187385A (en) Latch circuit including filter for metastable prevention
JPH0369446B2 (enrdf_load_stackoverflow)
JPH0311437B2 (enrdf_load_stackoverflow)
KR0131431Y1 (ko) 신호 디바운스회로
JPS605492A (ja) 半導体メモリ装置のアドレスバツフア回路
JPS6142895B2 (enrdf_load_stackoverflow)
JPH02196528A (ja) 終端回路
KR0118634Y1 (ko) 주파수 체배기
JPH0332137A (ja) 信号伝送装置
KR940004543Y1 (ko) 다용도 플립플롭
JP2658327B2 (ja) 論理回路
JP2690615B2 (ja) 論理回路
KR950004369Y1 (ko) 모듈-3 카운터
JPH05291895A (ja) クロック選択回路
JPS648495B2 (enrdf_load_stackoverflow)
JPS642247B2 (enrdf_load_stackoverflow)
JPH0547193A (ja) 論理回路

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term