JPH0368479B2 - - Google Patents

Info

Publication number
JPH0368479B2
JPH0368479B2 JP59257746A JP25774684A JPH0368479B2 JP H0368479 B2 JPH0368479 B2 JP H0368479B2 JP 59257746 A JP59257746 A JP 59257746A JP 25774684 A JP25774684 A JP 25774684A JP H0368479 B2 JPH0368479 B2 JP H0368479B2
Authority
JP
Japan
Prior art keywords
read
data
fet
memory
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59257746A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60148000A (ja
Inventor
Gasu Eipaasupatsuku Ansonii
Maikeru Fuitsutsujerarudo Josefu
Tangu Uyu Fuiritsupu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS60148000A publication Critical patent/JPS60148000A/ja
Publication of JPH0368479B2 publication Critical patent/JPH0368479B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
JP59257746A 1984-01-09 1984-12-07 メモリ Granted JPS60148000A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/569,080 US4618943A (en) 1984-01-09 1984-01-09 Semiconductor static read/write memory having an additional read-only capability
US569080 1990-08-17

Publications (2)

Publication Number Publication Date
JPS60148000A JPS60148000A (ja) 1985-08-05
JPH0368479B2 true JPH0368479B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-10-28

Family

ID=24274025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59257746A Granted JPS60148000A (ja) 1984-01-09 1984-12-07 メモリ

Country Status (4)

Country Link
US (1) US4618943A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0152584B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS60148000A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3480136D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62121979A (ja) * 1985-11-22 1987-06-03 Mitsubishi Electric Corp 集積回路メモリ
JPS62217493A (ja) * 1986-02-27 1987-09-24 Fujitsu Ltd 半導体不揮発性記憶装置
JP2569538B2 (ja) * 1987-03-17 1997-01-08 ソニー株式会社 メモリ装置
FR2623651B1 (fr) * 1987-11-20 1992-11-27 Sgs Thomson Microelectronics Plan memoire et procede et prototype de definition d'un circuit integre electronique comportant un tel plan memoire
JPH0743954B2 (ja) * 1988-06-30 1995-05-15 三菱電機株式会社 半導体記憶装置
JP2550207B2 (ja) * 1990-06-08 1996-11-06 株式会社東芝 半導体メモリセル
JPH08129876A (ja) * 1994-10-28 1996-05-21 Nec Corp 半導体記憶装置
DE19960247B4 (de) 1999-12-14 2005-09-08 Infineon Technologies Ag Datenspeicher und Verfahren
JP2003077294A (ja) * 2001-08-31 2003-03-14 Mitsubishi Electric Corp メモリ回路
US9449709B1 (en) 2015-09-23 2016-09-20 Qualcomm Incorporated Volatile memory and one-time program (OTP) compatible memory cell and programming method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2065617B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1969-10-31 1976-02-06 Licentia Gmbh
US3820086A (en) * 1972-05-01 1974-06-25 Ibm Read only memory(rom)superimposed on read/write memory(ram)
JPS5756155B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-10-03 1982-11-27
US4006469A (en) * 1975-12-16 1977-02-01 International Business Machines Corporation Data storage cell with transistors operating at different threshold voltages
US4095281A (en) * 1976-03-04 1978-06-13 Rca Corporation Random access-erasable read only memory cell
JPS5440533A (en) * 1977-09-06 1979-03-30 Mitsubishi Electric Corp Semiconductor memory unit
JPS5660298U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1979-10-12 1981-05-22
US4439842A (en) * 1979-12-28 1984-03-27 International Business Machines Corp. Bipolar transistor read only or read-write store with low impedance sense amplifier
JPS5746393A (en) * 1980-07-28 1982-03-16 Ibm Memory
US4434479A (en) * 1981-11-02 1984-02-28 Mcdonnell Douglas Corporation Nonvolatile memory sensing system

Also Published As

Publication number Publication date
DE3480136D1 (en) 1989-11-16
JPS60148000A (ja) 1985-08-05
EP0152584A3 (en) 1987-01-14
EP0152584B1 (en) 1989-10-11
US4618943A (en) 1986-10-21
EP0152584A2 (en) 1985-08-28

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