JPH0368157A - High frequency thick film integrated circuit device - Google Patents

High frequency thick film integrated circuit device

Info

Publication number
JPH0368157A
JPH0368157A JP20312489A JP20312489A JPH0368157A JP H0368157 A JPH0368157 A JP H0368157A JP 20312489 A JP20312489 A JP 20312489A JP 20312489 A JP20312489 A JP 20312489A JP H0368157 A JPH0368157 A JP H0368157A
Authority
JP
Japan
Prior art keywords
ceramic substrate
thick film
circuit device
integrated circuit
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20312489A
Other languages
Japanese (ja)
Inventor
Osamu Nakayama
修 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20312489A priority Critical patent/JPH0368157A/en
Publication of JPH0368157A publication Critical patent/JPH0368157A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:Not only to easily solder a heat sink but also to make a device stable in quality by a method wherein groove-like cuts are provided to an electrode formed on the rear side of a ceramic board from its peripheral part. CONSTITUTION:Cuts are provided to a conductor 2 formed on the rear side of a ceramic board 1 from its peripheral part. As ceramic is exposed only at the cuts, the cuts are not wet with solder and gaps are induced. Therefore, when a heat sink is joined to the conductor 2, it can be easily joined to the conductor 2 by soldering as gas is discharged outside through the cuts.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 こ、の発明は高周波用厚膜集積回路装置(以下高周波用
ハイブリッド1cと称す)の構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to the structure of a high-frequency thick film integrated circuit device (hereinafter referred to as high-frequency hybrid 1c).

〔従来の技術〕[Conventional technology]

第4図は従来の高周波用ハイブリッドICを示す図であ
り、図において(1a)は回路を表面に有するセラミッ
ク基板、(3a)は熱を逃すための放熱板、(7)はセ
ラミック基板(1a)と放熱板(3a)を接合するする
ための半田を示す。第5図はセラミック基板(1a)の
側面図及び底面図であり裏面には全面導体がメタライズ
しである。第6図は放熱板〔3a)を示す図であり、通
常鋼の素材に錫を〜10μm程度めっきしたものが使用
されている。
FIG. 4 is a diagram showing a conventional high-frequency hybrid IC, in which (1a) is a ceramic substrate with a circuit on its surface, (3a) is a heat sink for dissipating heat, and (7) is a ceramic substrate (1a). ) and the heat sink (3a) are shown. FIG. 5 is a side view and a bottom view of the ceramic substrate (1a), and the entire back surface is metalized with a conductor. FIG. 6 is a diagram showing a heat sink [3a], which is usually made of steel and plated with tin to a thickness of about 10 μm.

次に動作について説明する。まず、約200″O程度(
半田の液相線より高い温度)に熱した板の上に放熱板(
3a)を載せ所定時間経過後、フラックス及び半田を載
せセラミック基板(1a)を載せ、セラミック基板(1
a)を左右、縦方向に何度も動かすことにより、セラミ
ック基板裏面の導体(2a)と放熱板(3a)を半田(
7)にて接合する。
Next, the operation will be explained. First, about 200″O (
Place a heat sink (
After a predetermined time has elapsed, flux and solder is placed on the ceramic substrate (1a), and the ceramic substrate (1a) is placed on the ceramic substrate (1a).
By moving a) left and right and vertically many times, solder (
7) Join.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の高周波用ハイブリッドICは以上の様に構成され
ていたので、半田接合時において発生したガスが抜けに
くいため、セラミック基板を時間をかけて何度も動かさ
なければならず、しかもガスが抜けきらず、巣(8)と
して残存することがあり、この場合巣がセラミック基板
上に実装しているトランジスタ等発熱体の下に存在する
と、発生した熱が放熱板に逃げにぐくなるため、トラン
ジスタの破壊、高周波用ハイブリッドICの電気的特性
不良等が発生するという問題点があった。
Conventional high-frequency hybrid ICs were constructed as described above, and it was difficult for the gas generated during soldering to escape, so the ceramic substrate had to be moved many times over time, and the gas could not escape completely. In this case, if the cavity exists under a heat generating element such as a transistor mounted on a ceramic substrate, the generated heat will be difficult to escape to the heat sink, so the transistor There were problems such as destruction and defective electrical characteristics of the high-frequency hybrid IC.

この発明は上記の様な問題点を解消するためになされた
もので、半田接合を容易にすると共に品質の安定した高
周波用ハイブリッドICを得ることを目的とする。
This invention was made to solve the above-mentioned problems, and aims to provide a high-frequency hybrid IC that facilitates soldering and has stable quality.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る高周波用ハイブリッドICは、セラミッ
ク基板表置の導体のメタライズを外周から溝状に切れ目
を入れたものである。
The high-frequency hybrid IC according to the present invention has a groove-shaped cut in the metallized conductor placed on a ceramic substrate from the outer periphery.

〔作用〕[Effect]

この発明における高周波用ハイブリッドICは、セラミ
ック基板裏面の導体切れ白部からフラックス及び半田か
ら発生したガスが抜け、又連続した接着面積が小さくな
る。
In the high-frequency hybrid IC according to the present invention, gas generated from flux and solder escapes from the blank portion of the conductor on the back surface of the ceramic substrate, and the continuous bonding area becomes smaller.

〔実施例〕 以下、この発明の一実施例を図について説明する。第1
図において、(1)はセラミック基板のセラミック部、
(2]はセラミック基板(1)の裏面に施した導体を示
す。導体(2]は図示の如く中央部lこおいて切れ目が
あるため、その部分のみセラミックが露出した状態にな
っている。即ち、この切れ目部分は半田と濡れずすきま
を生じるため、半田接合時にガスが通って外に抜け、ガ
スが残存しにくい。
[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
In the figure, (1) is the ceramic part of the ceramic substrate;
(2) shows a conductor applied to the back surface of the ceramic substrate (1).As shown in the figure, the conductor (2) has a cut at the center, so that only that part of the ceramic is exposed. That is, this cut portion does not wet the solder and creates a gap, so gas passes through and escapes during solder bonding, making it difficult for gas to remain.

又、切れ目により連続した最大接着面積が従来の1/2
になっているため半田接合が容易になる。
Also, due to the cuts, the maximum continuous bonding area is 1/2 that of conventional adhesives.
This makes soldering easier.

第2図、第3図はこの発明の他の実施例を示したもので
、図に示す様に導体のパターンを形成すると更に効果が
あがることもあり、このパターンは表面の回路パターン
に合わせて設計する必要がある。
Figures 2 and 3 show other embodiments of the present invention, and the effect may be even better if a conductor pattern is formed as shown in the figure. need to be designed.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、セラミック基板と放熱
板の間iこ溝状のすきまを設けたので、半田接合時に発
生したガスが抜は易く、しかもその溝により最大接着面
積が小さくなるため半田接合に要する時間が短くなると
共に、巣の残存の少ない品質の安定した高周波用厚膜集
積回路装置が得られる効果がある。
As described above, according to the present invention, since the groove-shaped gap is provided between the ceramic substrate and the heat sink, gas generated during soldering can be easily released, and the groove reduces the maximum bonding area. This has the effect of shortening the time required for the process and providing a high-frequency thick film integrated circuit device with stable quality and few remaining cavities.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)(b)はこの発明の一実施例を示すセラミ
ック基板裏面の導体の形状を示す正向図および底面図、
第2図・第3図はこの発明の他の実施例を示すセラミッ
ク基板の正向図および底百図、第4図は従来の高周波用
厚膜回路装置の組立後の正向図及び平面図、第5図は従
来のセラミック基板を示す正補図及び底簡図、@6図は
従来の放熱板を示す平面図及び正面図である。 図において、(1)はセラミック基板のセラミック部、
(2]は導体部を示す。 なお、図中、同一符号は同一 または相当部分を示す。 第1図 2:導体部
FIGS. 1(a) and 1(b) are a front view and a bottom view showing the shape of a conductor on the back surface of a ceramic substrate showing an embodiment of the present invention,
2 and 3 are a front view and a bottom view of a ceramic substrate showing another embodiment of the present invention, and FIG. 4 is a front view and a plan view of a conventional high frequency thick film circuit device after assembly. , FIG. 5 is a corrected view and a simplified bottom view showing a conventional ceramic substrate, and FIG. 6 is a plan view and a front view showing a conventional heat sink. In the figure, (1) is the ceramic part of the ceramic substrate;
(2) indicates the conductor part. In the figures, the same reference numerals indicate the same or equivalent parts. Figure 1 2: Conductor part

Claims (1)

【特許請求の範囲】[Claims]  回路を有したセラミツク基板と金属製放熱板を半田で
接合した構造の高周波用厚膜集積回路装置において、前
記セラミツク基板の裏面の電極を外周から中に向つた切
れ目を有したことを特徴とする高周波用厚膜集積回路装
置。
A high frequency thick film integrated circuit device having a structure in which a ceramic substrate having a circuit and a metal heat sink are joined by soldering, characterized in that the electrode on the back side of the ceramic substrate has a cut extending from the outer periphery to the inside. Thick film integrated circuit device for high frequency.
JP20312489A 1989-08-05 1989-08-05 High frequency thick film integrated circuit device Pending JPH0368157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20312489A JPH0368157A (en) 1989-08-05 1989-08-05 High frequency thick film integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20312489A JPH0368157A (en) 1989-08-05 1989-08-05 High frequency thick film integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0368157A true JPH0368157A (en) 1991-03-25

Family

ID=16468802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20312489A Pending JPH0368157A (en) 1989-08-05 1989-08-05 High frequency thick film integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0368157A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0528606A2 (en) * 1991-08-13 1993-02-24 Parker-Hannifin Corporation Thermally conductive interface materials
US6756668B2 (en) 2001-10-25 2004-06-29 Samsung Electronics Co., Ltd. Semiconductor package having thermal interface material (TIM)
JPWO2003037316A1 (en) * 2001-10-11 2005-02-17 株式会社カネカ Peroxisome proliferator-responsive receptor ligand agent and method for producing the same
JP2012034070A (en) * 2010-07-29 2012-02-16 Casio Comput Co Ltd Method of bonding substrate, mounting structure of substrate, electronic apparatus, and substrate
JP2014022576A (en) * 2012-07-18 2014-02-03 Nichia Chem Ind Ltd Semiconductor element mounting member and semiconductor device
JP2016184756A (en) * 2016-06-10 2016-10-20 日亜化学工業株式会社 Semiconductor element mounting member and semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0528606A2 (en) * 1991-08-13 1993-02-24 Parker-Hannifin Corporation Thermally conductive interface materials
US5298791A (en) * 1991-08-13 1994-03-29 Chomerics, Inc. Thermally conductive electrical assembly
JPWO2003037316A1 (en) * 2001-10-11 2005-02-17 株式会社カネカ Peroxisome proliferator-responsive receptor ligand agent and method for producing the same
US6756668B2 (en) 2001-10-25 2004-06-29 Samsung Electronics Co., Ltd. Semiconductor package having thermal interface material (TIM)
KR100443399B1 (en) * 2001-10-25 2004-08-09 삼성전자주식회사 Semiconductor package having thermal interface material(TIM) formed void
US7081375B2 (en) 2001-10-25 2006-07-25 Samsung Electronics Co., Ltd. Semiconductor package having thermal interface material (TIM)
JP2012034070A (en) * 2010-07-29 2012-02-16 Casio Comput Co Ltd Method of bonding substrate, mounting structure of substrate, electronic apparatus, and substrate
JP2014022576A (en) * 2012-07-18 2014-02-03 Nichia Chem Ind Ltd Semiconductor element mounting member and semiconductor device
JP2016184756A (en) * 2016-06-10 2016-10-20 日亜化学工業株式会社 Semiconductor element mounting member and semiconductor device

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