JPH0363868A - Function extending system - Google Patents

Abstract

PURPOSE:To extend the function of an information processor by connecting a dedicated control circuit which can reduce a load on a CPU(central processing unit) by controlling an input/output device loadably/unloadably freely to the route of a bus which connects the CPU to the input/output device. CONSTITUTION:When no dedicated control circuit 5 is connected to the route of the bus B which connects the CPU 1 to the input/output device 3 via a con nection means 4, the CPU 1 performs the control of the input/output device 3 according to a program stored in a main memory device 2. Meanwhile, when the dedicated control circuit 5 is connected to the route, a command control part 51 receives, for example, a graphic plotting command from the CPU 1 via the connection means 4, and sends it to a command buffer 52, and also, expedites the execution of the plotting command to a sub CPU 53. The sub CPU 53 takes out the plotting command, and performs the control of a display device included in the input/output device according to the processing procedure of the plotting command stored in a local memory 5 in advance. In such a way, the function can be extended.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a function expansion method in an information processing apparatus such as a personal computer.

[Conventional technology]

A personal computer or the like is an information processing device in which a CPU, a main storage device, and an input/output device are connected by a bus, and the CPU controls the input/output device based on a program stored in the main storage device.

As semiconductor technology advances, the performance of microprocessors used as CPUs in personal computers and the like has significantly improved, becoming faster and more sophisticated.

However, even processing devices using these microprocessors may not have sufficient performance when performing multiple processes in parallel. Therefore, a parallel processing method is provided in which a dedicated control circuit is separately provided to execute a specific process, and this dedicated control circuit is connected to a processing device to perform processing in parallel with the CPU. Shown in Figure 2. In the figure, 1 is a CPU, 2 is a main storage device, 3 is an input/output device, 11 is a local memory, 12 is a drawing processor, 1
3 is a display device, and 14 is a storage means.

For a normal information processing device, it is sufficient to have a CPUI, a main storage device 2, and an input/output device 3. The CPUI performs processing operations based on programs stored in the main storage device 2, and the input/output device Control 3. This is the CPU
In addition to drawing figures and images, for example, I has many other processes that must be performed in parallel.
The burden will be too heavy.

Therefore, in FIG. 2, the drawing processor 12 is connected to the storage means 14.
The drawing processor 12 connects to the CPU via the CPU
It performs drawing processing in place of tJ4, thereby reducing the burden on the CPU. That is, in such a case, the CPUI writes a command to perform drawing processing to the storage means 14. Then, the drawing processor 12 reads this, performs drawing processing according to a drawing processing program stored in the local memory 11 in advance, and displays the result on the display device 13 to assist the CPU 1.

Such an example is described in JP-A-63-70386.

[Problem to be solved by the invention]

In the conventional parallel processing method as described above, the functionality is expanded by the fact that the drawing processor 12 performs the processing operations compared to when the CPU independently performs the processing operations, but the CPU does not perform the processing operations independently. Compared to when the computer was installed (that is, when the drawing processor 12 and storage means 14 were removed), the hardware configuration has completely changed, so the programs used by the CPU up until then cannot be used at all. This means that another new program must be stored, and compatibility with a general-purpose information processing device (personal computer) consisting only of a CPU, a main memory device 2, and an input/output device 3 will be lost. There's a problem.

In addition, the entire system as an information processing device has to be changed in order to improve partial functionality by speeding up a specific process, resulting in a problem that the time required for development becomes longer.

An object of the present invention is to solve the problems in the prior art and to be able to expand the functionality of processing operations without losing compatibility with general-purpose information processing devices (for example, personal computers). Another object of the present invention is to provide a function expansion method for an information processing apparatus that makes it unnecessary to change the entire system in order to improve partial functions such as increasing the speed of specific processing.

[Means to solve the problem]

To achieve the above object, the present invention provides information processing in which a CPU, a main storage device, and an input/output device are connected by a bus, and the CPU controls the input/output device based on a program stored in the main storage device. In the apparatus, the CP
On the bus route connecting U and the input/output device, the C
A dedicated control circuit that can reduce the burden on the CPU by controlling the input/output device in place of the PU,
It is configured so that it can be connected to the attachment/detachment opening via the connection means.

(Function) Since it is detachable, the dedicated control circuit can be disconnected from the connection.In this case, the CPU can be used as a general information processing device (for example, a personal computer) that controls input/output devices. Since it functions as a general-purpose information processing device, there is no loss of compatibility with general-purpose information processing devices.On the other hand, when a dedicated control circuit is connected by the connection means, For example, a included sub-CPU assists the CPU to control input/output devices, thereby realizing functional expansion.

Of course, in the CPU, the program used differs depending on whether the dedicated control circuit is connected or disconnected, so only this program must be switched.

[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1 is a CPU, 2 is a main storage device, 3 is an input/output device, 4 is a connecting means, and 5 is a dedicated control circuit.

When the dedicated control circuit 5 is not connected via the connection means 4 to the path of the bus B connecting the CPUI and the input/output device 3,
That is, when the connection means 4 is simply a through path, the CPUI controls the input/output device 3 according to the program stored in the main storage device 2. Here, the input/output device 3 is, for example, a display device or a file control device. Further, the dedicated control circuit 5 is usually installed as an adapter board.

FIG. 1A is a block diagram showing a specific example of the dedicated control circuit 5 in FIG.

In FIG. 1A, 51 is a command control unit, 52 is a command buffer, 53 is a CPU 7', and 54 is a local memory.

The circuit operation will be explained with reference to FIG. 1 and FIG. 1A. When the dedicated control circuit 5 is connected via the connection means 4, the dedicated control circuit 5 is interposed between the CPUI and the input/output device 3.

Therefore, the command control unit 51 connects the CP via the connection means 4.
For example, it receives a graphic drawing command from the UI, sends it to the command buffer 52, and also sends it to the sub-C
The PU 53 is prompted to execute the groove drawing command. Sub C
The PU 53 takes out a drawing command from the command buffer 52 and controls the display device included in the input/output device 3 while following the specific processing procedure of the drawing command stored in advance in the local memory 54 .

Note that, after the CPUI sends a drawing command to the command control unit 51 on the dedicated control circuit 5 in the form of an adapter board, it is of course possible to execute the next process in parallel.

FIG. 3 is a block diagram showing an example in which a bus switching method using electrical means is adopted as the connection means 4. In the figure, 41 is a dedicated control circuit 5 in the form of an adapter board.
This is the connection part or connector for attaching the . If the adapter board (dedicated control circuit) 5 is not attached to this connector 41, the detection unit 43 detects this,
A signal 44 as the information is transmitted to the switch 42. The switch 42 is thereby turned on, and the CPU
and the input/output device 3 are connected.

When the adapter board 5 is attached to the connector 41,
The detection unit 43 detects this and transmits the signal 44 as the information to the switch 42, so that the switch 42
is in the off state. At the same time, an adapter board (dedicated control circuit) 5 is connected interposed between the CPU 1 and the input/output device 3.

Specifically, the switch 42 connects two-way bus transceivers (three cheat games) Gl to G as shown in FIG.
6). A signal 44 from the detection section 43 becomes a gate signal G, which controls on/off of the bus. When the adapter board 5 is attached, the detection unit 43 outputs a "high" level signal G as the signal 44. As a result, the outputs of AND gates At and A2 both become "low", so that the pass transceiver (three-state gate G
1 to G6) are in a high impedance state, and the CPUI
The bus from there will be disconnected and detoured to the connector 41 side. The input/output device 3 is supplied with a signal from an adapter board (dedicated control circuit) 5.

When the adapter board 5 is attached to the connector 41, the detection unit 43 sends the low level signal G to the signal 44.
Output as . Then, if the direction designation signal Dir given from the CPU, etc. is at "high" level, the output of AND gate A2 is "high" and the output of AND gate 1-AI is "low", so the three-state gate Gl
, G2. G3 is turned on, G4. G5. G6 remains off, so bus B goes from top to bottom (i.e. CPU
G to input/output device 3 side).

On the other hand, the detection unit 43 outputs the low level signal G to the signal 44.
If the direction designation signal Dir given from the CPUI is at "low level" under the state where it is outputted as State gate G4.
G5. G6 turns on, Gl, G2 . Since G3 remains off, bus B conducts from bottom to top (that is, from the input/output device 3 side to CPtJl).

FIG. 5 is a block diagram showing a configuration method in which the connecting means 4 in FIG. 1 is realized by the connector 41 itself for mounting the adapter board 5. As shown in FIG.

In this method, bus switching is done mechanically. When the adapter 5 is inserted into the connector 41 and connected, the adapter 5 is immediately interposed between the CPU and the input/output device 3, and when the adapter 5 is removed from the connector 41, the CPU is immediately connected.
U1 and the input/output device 3 are connected directly.

Figures 6 and 7 show the specific configuration for this purpose.
It is a diagram. These figures represent cross-sectional views of the connector 41.

FIG. 6 is a schematic diagram showing a system in which bus switching is performed using two different boards. In the figure, 100 is a board of a processing device consisting of a CPUI, a main storage device 2, an input/output device 3, etc., 101 is a connector for attaching an adapter board (dedicated control circuit) 5, and 102 is a C
Conductive line of bus connected to PUI, 103 is input/output device 3
This is the conductive line of the bus that connects to the bus.

As shown in FIG. 6(a), when the adapter board (dedicated control circuit) 5 is not connected, the conductive wires 102 and 103
By attaching a stylish connection board 104 to the connector 101, the CPU 1 and the input/output device 3 are connected. Furthermore, as shown in FIG. 6(b), by attaching the adapter board (dedicated control circuit) 5 to the connector 101, the conductive wires 102 and 103 are connected to the adapter board (dedicated control circuit) 5. 106.

That is, the dedicated control circuit 5 and the input/output device 3 are connected.

FIG. 7 is an explanatory diagram illustrating a bus switching method using a special connector. FIG. 7(a) shows the case where the adapter board (dedicated control circuit) 5 is not installed. In this case, conductive wa 102 and 103 are in contact inside connector 101. This allows the CPUI and input/output device 3
is connected.

FIG. 7(b) is a diagram when the adapter board (dedicated control circuit) 5 is attached to the connector 101.

As is clear from the figure, the conductive wires 102 and 103 come into contact with the conductive wire 106 of the adapter board 5,
The dedicated control circuit 5 and the input/output device 3 are connected.

According to the embodiment described above, the attachment state of the adapter board 5 by the connection means 4 and the control mechanism of the input/output device 3 are not independent. That is, when the adapter board 5 is not installed, the CPU controls the input/output device 3, and when the adapter board 5 is installed, the dedicated control circuit 5 controls the input/output device 3. Ta.

In this method, the control mechanism of the input/output device 3 is determined at the time of system startup and cannot be changed during the process. In other words, when the adapter board 5 is installed, the CP
Conventional application programs based only on U will not work.

Therefore, even when the adapter board 5 is installed, the CP
The configuration is such that the UI can control the input/output device 3. The embodiment will be explained with reference to FIGS. 8 and 9.

In addition, until now, the adapter board 5 and the dedicated control circuit 5
have been used as synonyms, but from now on, for convenience of explanation, the dedicated control circuit will be referred to as 51 and treated as one element included in the adapter board 5.

Now, FIG. 8 shows a path (54) that bypasses the dedicated control circuit 51 on the adapter board 5 equipped with the dedicated control circuit 51.
). A signal line 53 from the dedicated control circuit 51 and a signal line 54 on the bypass path are switched by a switching circuit 52 and connected to the input/output device 3 through a signal line 55. The switching of signals by the switching circuit 52 can be executed by software.

FIG. 9 shows a specific example of the configuration of the switching circuit 52.

Information for specifying the control mechanism of the input/output device 3 is set in the register 56. That is, when "O" is set in the register 56, the signal line 53 and the signal line 55 are disconnected.
Since the signal line 54 and the signal line 55 are connected, the input/output device 3 is controlled by the CPU.

Conversely, when the register 56 is set to "1", the signal line 53 and the signal line 55 are connected.The details of the circuit operation can be inferred by analogy from what was explained earlier with reference to FIG. I don't want to go into details because I think it will be well understood.

As explained above, according to this embodiment, when the adapter board 5 is installed, the input/output device 3 is controlled by the CPU.
Since it can be switched by the dedicated control circuit 51,
There is no need to remove the adapter board 5 when executing a conventional application program. This is an effect unique to this embodiment.

〔Effect of the invention〕

According to the present invention, since the bus can be switched using the connection means for installing the adapter board, the CP
Conventional application programs based only on U will continue to operate as they are.
A program for performing parallel processing has the advantage that it can be processed at high speed by using a dedicated control circuit. Furthermore, since the improved functionality is achieved in the form of an adapter board, it has the effect of shortening the development period compared to the case where it is achieved in the form of a different system.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.
1 is a block diagram showing a specific example of the dedicated control circuit in FIG. 1, FIG. 2 is a block diagram showing a conventional example of a function expansion method, and FIG. 3 is a block diagram showing a specific example of the connection means in FIG. 4 is a circuit diagram showing a specific example of the switch in FIG. 3, FIG. 5 is a block diagram showing another specific example of the connection means in FIG. 1, and FIGS. 6 and 7 are respectively shown in FIG. 8 is a sectional view showing an example of the configuration of the connecting means, FIG. 8 is a block diagram showing main parts of another embodiment of the present invention, and FIG.
FIG. 3 is a circuit diagram showing a specific example of the switching circuit shown in the figure. Explanation of symbols 1... CPU, 2... Main storage device, 3... Input/output device, 4... Connection means, 5... Adapter board (dedicated control circuit), 51... Dedicated control Circuit, 41... Connector Figure 1 Figure 1A Figure Figure 5 Figure 5 (a) 02 03 00 Figure (a) Figure 5

Claims (1)

[Scope of Claims] 1. A central processing unit (hereinafter abbreviated as CPU), a main storage device, and an input/output device are connected by a bus, and the CPU performs processing based on a program stored in the main storage device. In an information processing device that controls an input/output device, the load on the CPU is reduced by controlling the input/output device instead of the CPU on a bus route connecting the CPU and the input/output device. A dedicated control circuit that can be used is detachably connected via a connecting means, and the program used by the CPU when the dedicated control circuit is attached and the program used by the CPU when it is detached are switched. Features a feature expansion method. 2. In the function expansion system according to claim 1, the connecting means includes a detecting means for detecting whether the dedicated control circuit is in a put-on state or an undressed state, and a detection output from the detecting means. switch means for depending on the bus path to open and connect the dedicated control circuit therebetween, or to close the bus path and disconnect the dedicated control circuit. method. 3. In the function expansion system according to claim 1, when the dedicated control circuit is in the connected state, the connecting means opens the bus route and connects the dedicated control circuit therebetween; A functional expansion system characterized in that it comprises a mechanical connection means that closes the bus path and disconnects the dedicated control circuit when the dedicated control circuit is in the state. 4. In the function expansion method according to claim 1, the connecting means opens the bus route and connects the dedicated control circuit therebetween even though the dedicated control circuit is in a connected state; A function expansion system comprising a bus route switching circuit that bypasses the dedicated control circuit and disconnects the bus route.