JP3088407B2 - In-circuit emulator and in-circuit emulation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an in-circuit emulator and an in-circuit emulation method for emulating a target system.

[0002]

2. Description of the Related Art Conventionally, an in-circuit emulator and an in-circuit emulation method generally execute an emulation operation based on a predetermined clock signal. This clock signal is generally supplied from a target system.

Another conventional example 2 is disclosed in
As disclosed in Japanese Patent No. 40642, there is also known one provided with a circuit for selecting a clock signal built in an in-circuit emulator and a clock signal supplied from the target system separately from a clock signal supplied from the target system. Have been.

The monitor program controls the in-circuit emulator to download a user program into the memory of the target system, read the memory of the target system, and read / write the I / O value. Is performed for a processor that emulates a user program.

Generally, a program (monitor program) for controlling an in-circuit emulator operates at the same frequency as the operating frequency of a user program using a clock signal input from a target system as described above.

As a third conventional example, Japanese Patent Application Laid-Open No. 4-127
In the "microcomputer" disclosed in Japanese Patent No. 244, a technique for changing the operating frequency inside the CPU to a low speed during a supervisor interrupt by using a signal for notifying the state during a supervisor interrupt and enabling a low-speed memory to be used. Is disclosed.

In recent years, along with a demand for lower power consumption of a system, a processor having a subclock function of several KHz as a clock signal has appeared. In a system using this processor, the processor operates at a low frequency of several KHz when the subclock is used.

[0008]

However, in the above-mentioned prior art, in the case of an in-circuit emulator in which the monitor program uses the clock signal of the target system, when the processor operates at a low frequency at which the subclock is used, the monitor program is executed. The operation of the program itself becomes slow. As a result, there arises a problem that the entire operation of the in-circuit emulator becomes extremely slow.

For example, when a user program is to be written into an emulation memory of an emulator, the writing program operates at this low frequency, so that it takes several tens of times as long as the previous operation at several tens of MHz. Would.

In some cases, the response from the monitor program in communication with the host system that exchanges commands with the monitor program is delayed. For this reason, there is also a problem that the host system erroneously determines that a hangup has occurred.

Further, when changing an externally supplied clock, a hazard is generated at the time of clock switching due to a phase difference between different clock signals.

Therefore, when switching the clock, it is necessary to control the processor from the host system side to temporarily set the processor in a reset state, and to perform the switching during that time. As a result, improvement in the processing speed of the entire in-circuit emulator cannot be expected.

An object of the present invention is to provide an in-circuit emulator and an in-circuit emulation method capable of maintaining a processing speed even when a subclock is used.

[0014]

In order to achieve the above object, an in-circuit emulator according to the first aspect of the present invention is an in-circuit emulator that is connected to a predetermined target system and emulates this system. An emulation clock circuit for generating an emulation clock signal to be performed, and a clock switch for selecting and outputting any one of these while synchronizing the target clock signal and the emulation clock signal output from the target clock circuit held by the target system. And a processor that controls selection of a clock switching circuit based on monitor data of a monitor program that monitors emulation, and performs selection based on steps of the monitor program. It is characterized by a door.

The processor may be connected to an address bus and a data bus of the target system, and control the switching operation only before and after a bus cycle of the target access processing.

Further, the clock switching circuit may output a switching signal indicating that the clock switching based on the selection is in transition to the processor in synchronization with the target clock signal.

An in-circuit emulation method according to a fifth aspect of the present invention is an in-circuit emulation method which is connected to a predetermined target system and emulates the system, and generates an emulation clock signal for generating an emulation clock signal for performing emulation. A clock switching step of synchronizing a target clock signal output from a target clock circuit held by the target system and an emulation clock signal to select and output one of them, and a monitor program for monitoring emulation. A control step of controlling selection of a clock switching step based on monitor data, wherein the selection is performed based on steps of a monitor program.

In the above processor, the processor may be connected to the address bus and the data bus of the target system and executed, and the switching operation may be controlled only before and after the bus cycle of the target access processing.

Further, in the clock switching step, a switching signal indicating that the clock switching based on the selection is in transition may be output to the processor in synchronization with the target clock signal.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of an in-circuit emulator and an in-circuit emulation method according to the present invention will be described in detail with reference to the accompanying drawings. 1 to 5, there is shown an embodiment of an in-circuit emulator and an in-circuit emulation method according to the present invention.

FIG. 1 is a block diagram of an in-circuit emulator showing a configuration example of an embodiment of the present invention. 1, an in-circuit emulator 10 of the present embodiment includes an emulation clock circuit 1, a clock switching circuit 2, a processor 3, and a monitor program 4. The target system 20 includes a target clock circuit 7 and a target memory I / O 8
have.

The in-circuit emulator 10 configured as described above is connected to a target system 20 to be debugged by a target address bus 11 and a target data bus 12. Through this signal line, the processor 3 operates the memory and I / O of the target system 20.
8 is accessed. In addition, a monitor program 4 for processing various debug commands is connected to the processor 3.

Generally, an in-circuit emulator and an in-circuit emulation method require transparency to a target system. For this purpose, the target clock signal 21 to be supplied to the system is obtained from the target clock circuit 7 on the target system 20. In the present embodiment, apart from this, the processor 3 is always
An emulation clock circuit 1 is provided for operating the device at the highest operating frequency.

One of the output clocks of the target clock circuit 7 and the emulation clock circuit 1 is supplied to the processor 3 as a clock signal 13 after one of them is selected by the clock switching circuit 2. Details of the emulation clock circuit 1 will be described later.

The switching of the clock signal is performed by a clock switching signal 14 output from the processor 3. The clock switching signal 14 is a signal that can be controlled by the monitor program 4 described above.

Further, in order to confirm the switching transition in the monitor program 4, the processor 3 can read the switching signal 15 output from the clock switching circuit 2.

(Description of Operation) An example of the operation procedure of the embodiment will be described with reference to FIGS. 2, 3, and 4. FIG. FIG. 2 shows FIG.
5 is a flowchart showing an embodiment of a monitor program 4 for controlling the in-circuit emulator 10 shown in FIG. FIG. 3 is a timing chart showing a state of clock switching when transitioning from the monitor program 4 to target access processing. FIG. 4 is a timing chart showing the state of clock switching when transitioning to the monitor program after the end of the target access processing.

As shown in the flowchart of FIG. 2, when the in-circuit emulator 10 is started, the monitor program 4 initializes the in-circuit emulator 10 (step S1) and simultaneously executes the clock switching signal 14
And selects the emulation clock signal 16 to operate at the highest operating frequency (step S
2).

Thereafter, the monitor program 4 enters a process of receiving a command from a host system (not shown) connected to the in-circuit emulator 10. Thereafter, processing is performed according to the contents of the command. However, in general, as shown in FIG.
During the operation of, the processing for the command and the waiting for the command input are repeatedly performed (step S3).

When the command is received, the monitor program 4 switches the clock signal 13 of the processor 3 to the target clock signal 21 immediately before performing the target access processing (step S6) (steps S4 and S).
5). Note that the target access processing referred to here generally refers to reading and writing of a target memory and reading and writing of I / O.

Then, immediately after the end of the target access processing (step S6), the clock signal 13 is switched again to the emulation clock signal 16 (step S7,
S8). As a result, the target clock signal 21 is used only at a very short step of the instruction level required for the target access processing. Further, at the time of switching between the respective clocks, it is determined whether or not the switching is being performed (steps S8 and S9), thereby preventing access by unintended clocks.

Next, an example of the operation of the circuit of the in-circuit emulator 10 controlled by the monitor program will be described with reference to FIGS. 3 and 4 based on a timing chart.

FIG. 3 shows the timing of each signal in the operation of the monitor program described in the present embodiment after a command is received and the clock signal 13 is switched to the target clock signal 21 until the target access processing is performed. It is shown.

When a command is received during the monitoring process, the processor 3 outputs a clock switching signal 14 to the clock switching circuit 2 by the monitor program 4. When the clock switching signal 14 selects the target clock signal 21, the clock switching circuit 2 synchronizes the emulation clock signal 16 used so far with the target clock signal 21 while synchronizing the clock signal 13.
Switch the output. At that time, the in-switching signal 15 is output to the processor 3 in synchronization with the target clock signal 21 to indicate that the clock switching is in transition.

The processor 3 changes the target clock signal 21 during the switching transition period with the clock switching.
The monitor program 4 is continuously executed. This can be understood from the fact that the monitor address signal 17 has been output and the monitor data signal 18 has been fetched.

The monitor program 4 includes a clock signal 13
Is switched to the target clock signal 21 to perform target access. At this time, an address signal is output to the target address bus 11, and the corresponding target device (memory I / O 8) is
Read or write occurs. At this time, since the target clock signal 21 is used as the clock signal 13, even if a low-speed device exists, the access is not in time.

Next, in FIG. 4, the target access processing is completed, and the clock signal is switched from the target clock signal 21 to the emulation clock signal 16.
Until the monitor program runs at the maximum operating frequency,
This is shown in the timing chart.

When the target access processing is completed, the operation shifts to the monitor program 4 with the clock signal 13 still in the state of the target clock signal 21. During this switching transition period, the monitor program 4 outputs the clock switching signal 14 to select the emulation clock signal 16. With this signal, the clock signal 13
Is the target clock signal 21 used so far.
And the emulation clock signal 16 is synchronized with the emulation clock signal 16.

When the switching transition period ends, the monitoring process starts to be executed at the highest operating frequency, and the operation using the switching signal 15 at that time is the same as in FIG.

FIG. 5 shows an embodiment of the clock switching circuit 2 shown in the block diagram of FIG. Clock switching circuit 2
As described above, as described above, the switching is not performed directly by the clock switching signal 14 output from the processor 3 by the monitor program 4, but by switching once in synchronization with both the emulation clock signal 16 and the target clock signal 21. , The hazard of the clock signal 13 due to the phase difference is prevented.

Specifically, the target clock signal 21
The timing at which both the emulation clock signal 16 and the emulation clock signal 16 become LOW level is determined by the clock switching signal 14
The selector 33 is controlled by a signal that is sampled by the lip / flop 32 and synchronized. The switching signal 15 indicating that the clock is being switched is generated from the Ex-OR 34 of the emulation clock signal 16 and the output signal after the above-mentioned synchronization.

According to the above-described embodiment, only the minimum necessary instruction steps in the monitor program operate with the target clock signal, and the rest can be operated with the highest-speed emulation clock signal.
Therefore, the response time of the monitor program can be shortened as compared with the case where switching is not performed, and the download time of the program can be shortened.

For example, when operating with a 33 MHz emulation clock signal and when a subclock 32 KHz
In the case of operating with the target clock signal, the time difference per one byte written to the memory at the time of downloading the program indicates one clock of about 30 ns at 33 MHz operation. On the other hand, one clock at the time of 32 KHz operation is 31 μs, and a difference of about 1000 times occurs.

If it takes 16 minutes to download a program during the subclock operation, the download will be completed in about 1 second when the emulation clock signal operates at 33 MHz.

The above embodiment is an example of a preferred embodiment of the present invention. However, it is not limited to this.
Various modifications can be made without departing from the spirit of the present invention.

[0046]

As is apparent from the above description, the in-circuit emulator and the in-circuit emulation method of the present invention generate an emulation clock signal for performing emulation and output a target output from a target clock circuit held by the target system. While synchronizing the clock signal and the emulation clock signal, either one of them is selected and output, and the clock switching is controlled based on the monitor data of the monitor program that monitors the emulation, and the selection is made based on the steps of the monitor program. I do.

Therefore, only the minimum necessary instruction steps in the monitor program operate with the target clock signal, and the other operations can be performed using the high-speed emulation clock signal. Therefore, the response time of the monitor program can be shortened as compared with the case where switching is not performed, and the download time of the program can be shortened.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of an embodiment of an in-circuit emulator of the present invention.

FIG. 2 is a flowchart illustrating an example of a procedure of an in-circuit emulation method.

FIG. 3 is a timing chart showing a state of clock switching when transitioning from a monitor program to a target access process.

FIG. 4 is a timing chart showing a clock switching state when a transition is made to a monitor program after completion of a target access process.

FIG. 5 is a clock switching circuit 2 shown in the block diagram of FIG. 1;
FIG. 3 is a circuit configuration diagram of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Emulation clock circuit 2 Clock switching circuit 3 Processor 4 Monitor program 7 Target clock circuit 8 Target memory / I / O 10 In-circuit emulator 11 Target address bus 12 Target data bus 13 Clock signal 14 Clock switching signal 15 Switching signal 16 Emulation clock Signal 17 Monitor address signal 18 Monitor data signal 20 Target system 21 Target clock signal 32 Flip / Flop 33 Selector 34 Ex-OR

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-190431 (JP, A) JP-A 64-3745 (JP, A) JP-A-6-266575 (JP, A) JP-A 5- 100766 (JP, A) Hira 3-9041 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 11/22-11/34 G06F 1/06

Claims (8)

(57) [Claims] 1. An in-circuit emulator connected to a predetermined target system and emulating the system, comprising: an emulation clock circuit for generating an emulation clock signal for performing the emulation; and an output from a target clock circuit held by the target system. A clock switching circuit that selects and outputs one of the target clock signal and the emulation clock signal while synchronizing the target clock signal and the emulation clock signal; and selecting the clock switching circuit based on monitor data of a monitor program that monitors the emulation. An in-circuit emulator comprising: a processor that controls the selection of the monitor program; and performing the selection based on steps of the monitor program. 2. The in-circuit emulator according to claim 1, wherein the processor is connected to an address bus and a data bus of the target system. 3. The in-circuit emulator according to claim 2, wherein the processor controls the switching operation only before and after a bus cycle of the target access processing. 4. The clock switching circuit outputs a switching signal indicating that the clock switching based on the selection is in transition to the processor in synchronization with the target clock signal. 4. The in-circuit emulator according to any one of 1 to 3. 5. An in-circuit emulation method connected to a predetermined target system for emulating the system, comprising: an emulation clock generating step of generating an emulation clock signal for performing the emulation; and a target clock circuit possessed by the target system. A clock switching step of selecting and outputting one of them while synchronizing the target clock signal output from the emulation clock signal with the emulation clock signal; and the clock switching step based on monitor data of a monitor program for monitoring the emulation. And a control step of controlling selection of the in-circuit emulation method, wherein the selection is performed based on steps of the monitor program. 6. The in-circuit emulation method according to claim 5, wherein said control step is executed by connecting said processor to an address bus and a data bus of said target system. 7. The in-circuit emulation method according to claim 6, wherein the control step controls the switching operation only before and after a bus cycle of a target access process. 8. The clock switching step, wherein a switching signal indicating that the clock switching based on the selection is in transition is output to the processor in synchronization with the target clock signal. 8. The in-circuit emulation method according to any one of 5 to 7.