JPS59183424A - Information processor - Google Patents

Abstract

PURPOSE:To process information at a high speed by sorting the address signal lines of a program ROM into two groups and supplying the address signal sent from a CPU and the address signal sent from a peripheral device to another peripheral device via a connector. CONSTITUTION:Plural programs A-N are written to an ROM2, and the address signal lines 4 of the ROM2 are divided into two groups. The address signal sent from a CPU1 is supplied to an address signal line 4a; while an address signal line 4b is connected to a connector 5. Either one of peripheral equipment 7a-7n is connected to the connector 5. If the device 7a, for example, is connected to the connector 5, an area where a program A of the ROM2 is designated by the address signal given from an address terminal 6b. Thus the CPU1 can perform the information processing to read and write the data on the device 7a in accordance with the program A.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to an information processing device, for example, R
The present invention relates to a technology effective for microcomputers that process information according to programs written in OM (Read Only Memory).

[Background Art] In conventional microcomputers, a microprocessor CPU reads data from a peripheral IC that serves as information light, makes a judgment, and transfers an address to a processing program according to the content. disadvantages arise.

(]) Processing using the address transfer described above takes time and does not allow high-speed processing. In particular, it is difficult to increase the speed of a system that requires sequential scanning.

(2) Since the processing programs are created individually depending on the information light, the address space becomes larger accordingly.

[Purpose of the invention]

An object of the present invention is to provide an information processing device that achieves high-speed processing.

Another object of the present invention is to provide an information processing device that can effectively utilize address space.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the address signal lines of the program ROM are divided into two groups, and address signals from the microprocessor and
By supplying address signals from peripheral devices,
The above objective is achieved by selecting a processing program appropriate for the above peripheral device.

(Embodiment) A block diagram of an embodiment of the present invention is shown in the drawings.

ROM2 contains multiple programs A to N.
is written. The address signal line 4 of this ROM is
It is divided into two groups such as 4a and 4b. A microprocessor (C
An address signal from PU) 1 is supplied. This address signal is used as an address for the program step.

The address signal lines 4b of the other divided groups are connected to the connector 5, although not particularly limited thereto.

Then, one of the plurality of peripheral devices 7a to 7n is connected to this connector.

In the figure, a peripheral device 7a is connected to the connector 5. Therefore, the address signal lines 4b of the other groups of the ROM 2 are supplied with address signals from the peripheral device 7a. This address signal is an address for selecting one of the plurality of programs A to N, which is slightly shifted from each other. Therefore, one group of address signals is made up of low-order bits, and the other group of address signals is made up of high-order bits.

Further, the data bus 3 of the microprocessor 1 is connected to the data terminal 6a of the peripheral device via the ROM and the connector 5.

When the peripheral device 7a is connected as described above, the address signal from the address terminal 6b causes the R
Since the area (memory block) in which the program A of OM2 is written is specified, the microprocessor 1 executes information processing such as reading and writing data in the peripheral device 7a according to the program A.

Also, if another peripheral device 7b is connected to the connector 5 instead of the peripheral device 7a, its address signal will cause the RO
Since the area in which program B of M2 is written is specified, microprocessor 1 executes information processing similar to the above according to program B. In this manner, in this embodiment, a program suitable for the peripheral device is automatically selected, and information processing is performed in accordance with that program.

〔effect〕

(11) The address transfer process, in which the microprocessor reads data from peripheral devices that serve as information light and makes decisions, as in the past, can be omitted, and multiple programs can be selected automatically, increasing speed. The effect is that it is possible to achieve the following.

(2) From the perspective of a microprocessor, multiple programs can be stored in the same address space, resulting in the effect that the address space can be used effectively.

(3) According to (11 and (2)) above, the effect can be obtained that the basic program used in the system can be easily transferred to other systems without changing it.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that this invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, if multiple peripheral devices are connected by a switching circuit, one peripheral device can be controlled by a microprocessor and an RO.
It may be connected to M. In addition, the peripheral devices mentioned above include slave CPUs, memory devices, and various peripheral I/O devices.
It may be anything such as C (integrated circuit).

[Application field]

This invention is based on the microprocessor and the RO for the program.
It can be widely used in various information processing devices including M and its peripheral devices.

[Brief explanation of the drawing]

The drawing is a block diagram showing an embodiment of the present invention. 1... Microprocessor, 2... ROM, 3... Data bus, 4 (4a, 4b')... r) Lux signal line for ROM, 5... Connector, 6 (6a, 6b) Connection terminal, 7 ( 7a~?n) ... Peripheral equipment -1λ

Claims (1)

[Claims] 1. A microprocessor sensor, a plurality of peripheral devices serving as its information light, and a ROM in which a plurality of programs are written, and the address signal line of the ROM is divided into two groups, One group is supplied with an address signal from the above-mentioned microprocessor, and the other group is supplied with an address signal from the above-mentioned peripheral device, and information processing is performed according to a program corresponding to the above-mentioned peripheral device among the plurality of programs. An information processing device characterized by: 2. The first aspect of the present invention is characterized in that one group of address signals obtained by dividing the ROM is a lower address signal, and the address signals of another group are upper address signals. The information processing device described in the section. 3. The address signals of the other groups are connected to the connector,
3. The information processing apparatus according to claim 1, wherein said one peripheral device is selectively connected via said connector.