JPH036352U - - Google Patents

Info

Publication number
JPH036352U
JPH036352U JP6719789U JP6719789U JPH036352U JP H036352 U JPH036352 U JP H036352U JP 6719789 U JP6719789 U JP 6719789U JP 6719789 U JP6719789 U JP 6719789U JP H036352 U JPH036352 U JP H036352U
Authority
JP
Japan
Prior art keywords
data
clock signal
logical operation
holding means
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6719789U
Other languages
Japanese (ja)
Other versions
JPH0735475Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989067197U priority Critical patent/JPH0735475Y2/en
Publication of JPH036352U publication Critical patent/JPH036352U/ja
Application granted granted Critical
Publication of JPH0735475Y2 publication Critical patent/JPH0735475Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の第1実施例であるデータ伝送
装置11のブロツク図、第2図はデータ伝送装置
11の動作を説明するためのタイミングチヤート
、第3図は本考案の第2実施例を示すブロツク図
、第4図は差動符号化の原理を説明するためのブ
ロツク図、第5図は従来のデータ伝送装置の構成
を示すブロツク図、第6図は従来のデータ伝送装
置の動作を説明するためのタイミングチヤートで
ある。 11……データ伝送装置、12……通信制御部
、13……差動符号回路、16……送信データバ
ツフア、17……クロツク発生回路、18……論
理演算回路、19……フリツプフロツプ、20…
…遅延回路。
FIG. 1 is a block diagram of a data transmission device 11 which is a first embodiment of the present invention, FIG. 2 is a timing chart for explaining the operation of the data transmission device 11, and FIG. 3 is a second embodiment of the present invention. 4 is a block diagram for explaining the principle of differential encoding. FIG. 5 is a block diagram showing the configuration of a conventional data transmission device. FIG. 6 is a block diagram showing the operation of a conventional data transmission device. This is a timing chart to explain. DESCRIPTION OF SYMBOLS 11...Data transmission device, 12...Communication control unit, 13...Differential code circuit, 16...Transmission data buffer, 17...Clock generation circuit, 18...Logic operation circuit, 19...Flip-flop, 20...
...Delay circuit.

Claims (1)

【実用新案登録請求の範囲】 予め定める周期のクロツク信号を発生するクロ
ツク信号発生手段と、 伝送すべきデータを、前記クロツク信号に同期
して出力するデータ出力手段とを含む伝送制御手
段と、 前記クロツク信号に応答し、クロツク信号入力
時のデータを次のクロツク信号が入力されるまで
の期間、保持して出力するデータ保持手段と、 データ出力手段からのデータとデータ保持手段
からのデータとに予め定める論理演算を行う論理
演算手段と、 論理演算手段の出力データを予め定める期間、
遅延してデータ保持手段に与える遅延手段とを含
むことを特徴とするデータ伝送装置。
[Claims for Utility Model Registration] Transmission control means including: clock signal generation means for generating a clock signal with a predetermined cycle; and data output means for outputting data to be transmitted in synchronization with the clock signal; Data holding means responds to a clock signal and holds and outputs the data at the time of input of the clock signal until the next clock signal is input, and the data from the data output means and the data from the data holding means. a logical operation means for performing a predetermined logical operation; and a predetermined period of time for output data of the logical operation means;
1. A data transmission device comprising: delay means for delaying and applying the data to the data holding means.
JP1989067197U 1989-06-07 1989-06-07 Data transmission equipment Expired - Lifetime JPH0735475Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989067197U JPH0735475Y2 (en) 1989-06-07 1989-06-07 Data transmission equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989067197U JPH0735475Y2 (en) 1989-06-07 1989-06-07 Data transmission equipment

Publications (2)

Publication Number Publication Date
JPH036352U true JPH036352U (en) 1991-01-22
JPH0735475Y2 JPH0735475Y2 (en) 1995-08-09

Family

ID=31600558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989067197U Expired - Lifetime JPH0735475Y2 (en) 1989-06-07 1989-06-07 Data transmission equipment

Country Status (1)

Country Link
JP (1) JPH0735475Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51117861A (en) * 1975-04-09 1976-10-16 Nec Corp Differential phase demodulator
JPS63152250A (en) * 1986-12-17 1988-06-24 Hitachi Ltd Digital signal transmission system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51117861A (en) * 1975-04-09 1976-10-16 Nec Corp Differential phase demodulator
JPS63152250A (en) * 1986-12-17 1988-06-24 Hitachi Ltd Digital signal transmission system

Also Published As

Publication number Publication date
JPH0735475Y2 (en) 1995-08-09

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