JPH0363098B2 - - Google Patents

Info

Publication number
JPH0363098B2
JPH0363098B2 JP59171146A JP17114684A JPH0363098B2 JP H0363098 B2 JPH0363098 B2 JP H0363098B2 JP 59171146 A JP59171146 A JP 59171146A JP 17114684 A JP17114684 A JP 17114684A JP H0363098 B2 JPH0363098 B2 JP H0363098B2
Authority
JP
Japan
Prior art keywords
interrupt
processor
command
service processor
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59171146A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6149260A (ja
Inventor
Jitsuo Masuda
Nobuyuki Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59171146A priority Critical patent/JPS6149260A/ja
Publication of JPS6149260A publication Critical patent/JPS6149260A/ja
Publication of JPH0363098B2 publication Critical patent/JPH0363098B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP59171146A 1984-08-17 1984-08-17 チヤネル処理装置 Granted JPS6149260A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59171146A JPS6149260A (ja) 1984-08-17 1984-08-17 チヤネル処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59171146A JPS6149260A (ja) 1984-08-17 1984-08-17 チヤネル処理装置

Publications (2)

Publication Number Publication Date
JPS6149260A JPS6149260A (ja) 1986-03-11
JPH0363098B2 true JPH0363098B2 (OSRAM) 1991-09-30

Family

ID=15917835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59171146A Granted JPS6149260A (ja) 1984-08-17 1984-08-17 チヤネル処理装置

Country Status (1)

Country Link
JP (1) JPS6149260A (OSRAM)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8814629D0 (en) * 1987-11-12 1988-07-27 Ibm Direct control facility for multiprocessor network

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57143669A (en) * 1981-02-28 1982-09-04 Omron Tateisi Electronics Co Debugging device for multiprocessor system

Also Published As

Publication number Publication date
JPS6149260A (ja) 1986-03-11

Similar Documents

Publication Publication Date Title
US5497501A (en) DMA controller using a predetermined number of transfers per request
US4516202A (en) Interface control system for high speed processing based on comparison of sampled data values to expected values
US5261083A (en) Floppy disk controller interface for suppressing false verify cycle errors
JPH0363098B2 (OSRAM)
JP3087481B2 (ja) イン・サーキット・エミュレータ
JPS599927B2 (ja) デ−タ転送制御方式
JPS593775B2 (ja) バス要求処理装置
JPH05307491A (ja) 多重化処理装置の切替方法および装置
JPS584365B2 (ja) リセツト制御システム
JP2554423Y2 (ja) メモリ制御装置
JP3022906B2 (ja) プログラマブルコントローラの通信方法
JP2667285B2 (ja) 割込制御装置
JP2558902B2 (ja) 半導体集積回路装置
JPS634210B2 (OSRAM)
JPH02730B2 (OSRAM)
JPS59103121A (ja) 情報処理装置
JPS60254362A (ja) デ−タ処理装置における状態情報の退避方法
JPH0157376B2 (OSRAM)
JPS597971B2 (ja) 入出力装置の制御方式
JPS6117012B2 (OSRAM)
JPS6136674B2 (OSRAM)
JPS6057609B2 (ja) 電子機器の停電処理制御方式
JPH0214331A (ja) 二重化システム診断方式
JPH04138750A (ja) 通信制御装置診断方式
JPH0433067B2 (OSRAM)