JPH0358537B2 - - Google Patents

Info

Publication number
JPH0358537B2
JPH0358537B2 JP60209086A JP20908685A JPH0358537B2 JP H0358537 B2 JPH0358537 B2 JP H0358537B2 JP 60209086 A JP60209086 A JP 60209086A JP 20908685 A JP20908685 A JP 20908685A JP H0358537 B2 JPH0358537 B2 JP H0358537B2
Authority
JP
Japan
Prior art keywords
flip chip
tape carrier
carrier film
bump
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60209086A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6267829A (ja
Inventor
Keiji Yamamura
Juichi Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60209086A priority Critical patent/JPS6267829A/ja
Publication of JPS6267829A publication Critical patent/JPS6267829A/ja
Priority to US07/233,843 priority patent/US4949224A/en
Publication of JPH0358537B2 publication Critical patent/JPH0358537B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP60209086A 1985-09-20 1985-09-20 フリップチップの実装構造 Granted JPS6267829A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP60209086A JPS6267829A (ja) 1985-09-20 1985-09-20 フリップチップの実装構造
US07/233,843 US4949224A (en) 1985-09-20 1988-08-16 Structure for mounting a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60209086A JPS6267829A (ja) 1985-09-20 1985-09-20 フリップチップの実装構造

Publications (2)

Publication Number Publication Date
JPS6267829A JPS6267829A (ja) 1987-03-27
JPH0358537B2 true JPH0358537B2 (fr) 1991-09-05

Family

ID=16567039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60209086A Granted JPS6267829A (ja) 1985-09-20 1985-09-20 フリップチップの実装構造

Country Status (1)

Country Link
JP (1) JPS6267829A (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682707B2 (ja) * 1988-10-21 1994-10-19 日本電気株式会社 半導体装置
WO1994024694A1 (fr) * 1993-04-14 1994-10-27 Amkor Electronics, Inc. Interconnexion d'une puce de circuit integree et d'un substrat
JPH0722470A (ja) * 1993-06-18 1995-01-24 Minnesota Mining & Mfg Co <3M> バンプ付きｔａｂテープ及びそれを用いた接合方法
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method
JP3551114B2 (ja) 2000-02-25 2004-08-04 日本電気株式会社 半導体装置の実装構造およびその方法

Also Published As

Publication number Publication date
JPS6267829A (ja) 1987-03-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees