JPH0347777B2 - - Google Patents
Info
- Publication number
- JPH0347777B2 JPH0347777B2 JP58037500A JP3750083A JPH0347777B2 JP H0347777 B2 JPH0347777 B2 JP H0347777B2 JP 58037500 A JP58037500 A JP 58037500A JP 3750083 A JP3750083 A JP 3750083A JP H0347777 B2 JPH0347777 B2 JP H0347777B2
- Authority
- JP
- Japan
- Prior art keywords
- gaasfet
- gate
- circuit
- dfet
- gaas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58037500A JPS59163857A (ja) | 1983-03-09 | 1983-03-09 | GaAs論理集積回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58037500A JPS59163857A (ja) | 1983-03-09 | 1983-03-09 | GaAs論理集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59163857A JPS59163857A (ja) | 1984-09-14 |
| JPH0347777B2 true JPH0347777B2 (enExample) | 1991-07-22 |
Family
ID=12499241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58037500A Granted JPS59163857A (ja) | 1983-03-09 | 1983-03-09 | GaAs論理集積回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59163857A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0223720A (ja) * | 1988-07-13 | 1990-01-25 | Sumitomo Electric Ind Ltd | 半導体回路 |
| JP3485559B1 (ja) | 2002-06-24 | 2004-01-13 | 沖電気工業株式会社 | 入力回路 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2449369A1 (fr) * | 1979-02-13 | 1980-09-12 | Thomson Csf | Circuit logique comportant une resistance saturable |
| JPS5646340A (en) * | 1979-09-22 | 1981-04-27 | Nippon Telegr & Teleph Corp <Ntt> | Logic circuit using schottky or p-n junction gate type field effect transistor |
-
1983
- 1983-03-09 JP JP58037500A patent/JPS59163857A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59163857A (ja) | 1984-09-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5034629A (en) | Output control circuit for reducing through current in CMOS output buffer | |
| US4810969A (en) | High speed logic circuit having feedback to prevent current in the output stage | |
| JP2559032B2 (ja) | 差動増幅回路 | |
| US4931669A (en) | High speed logic circuit having output feedback | |
| US4885480A (en) | Source follower field-effect logic gate (SFFL) suitable for III-V technologies | |
| EP0320582A2 (en) | Bicmos driver circuit including submicron on-chip voltage source | |
| US4712022A (en) | Multiple input OR-AND circuit for FET logic | |
| JPH0347777B2 (enExample) | ||
| JP3255874B2 (ja) | 定電流回路 | |
| JPH09261038A (ja) | 論理回路 | |
| US5852382A (en) | Three-state CMOS output buffer circuit | |
| US5173622A (en) | Source coupled logic circuit with reduced power consumption | |
| JPH0347778B2 (enExample) | ||
| US5343091A (en) | Semiconductor logic integrated circuit having improved noise margin over DCFL circuits | |
| JP3086754B2 (ja) | 半導体論理集積回路 | |
| JPH03227118A (ja) | 半導体論理回路 | |
| JPH0347776B2 (enExample) | ||
| JPH0411050B2 (enExample) | ||
| JP2751419B2 (ja) | 半導体集積回路 | |
| JPS6356016A (ja) | 論理回路 | |
| JPH06291618A (ja) | データ保持回路 | |
| JP2830222B2 (ja) | 半導体集積回路装置 | |
| JPH0271612A (ja) | 改良した能動電流源を有する半導体論理回路 | |
| JPH07105712B2 (ja) | 論理回路 | |
| CA1244529A (en) | Depletion mode fet logic system |