JPH0345530B2 - - Google Patents

Info

Publication number
JPH0345530B2
JPH0345530B2 JP56211191A JP21119181A JPH0345530B2 JP H0345530 B2 JPH0345530 B2 JP H0345530B2 JP 56211191 A JP56211191 A JP 56211191A JP 21119181 A JP21119181 A JP 21119181A JP H0345530 B2 JPH0345530 B2 JP H0345530B2
Authority
JP
Japan
Prior art keywords
layer
recess
crystal silicon
polycrystalline silicon
silicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56211191A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58115832A (ja
Inventor
Tsutomu Ogawa
Hajime Kamioka
Seiichiro Kawamura
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56211191A priority Critical patent/JPS58115832A/ja
Priority to EP82306973A priority patent/EP0084265B1/en
Priority to DE8282306973T priority patent/DE3278259D1/de
Publication of JPS58115832A publication Critical patent/JPS58115832A/ja
Priority to US07/553,361 priority patent/US5011783A/en
Publication of JPH0345530B2 publication Critical patent/JPH0345530B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P14/3238—
    • H10P14/2905—
    • H10P14/3411—
    • H10P14/3458—
    • H10P14/3808—
    • H10P14/3818—
    • H10P90/1906—
    • H10W10/061—
    • H10W10/181—
    • H10P90/1912—

Landscapes

  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP56211191A 1981-12-28 1981-12-28 半導体装置の製造方法 Granted JPS58115832A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP56211191A JPS58115832A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法
EP82306973A EP0084265B1 (en) 1981-12-28 1982-12-24 Method of producing a semiconductor device comprising a plurality of recrystallized monocrystal regions
DE8282306973T DE3278259D1 (en) 1981-12-28 1982-12-24 Method of producing a semiconductor device comprising a plurality of recrystallized monocrystal regions
US07/553,361 US5011783A (en) 1981-12-28 1990-07-16 Forming selective single crystal regions in insulated pockets formed on silicon by energy beams and devices formed in the pockets

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56211191A JPS58115832A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58115832A JPS58115832A (ja) 1983-07-09
JPH0345530B2 true JPH0345530B2 (enExample) 1991-07-11

Family

ID=16601896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56211191A Granted JPS58115832A (ja) 1981-12-28 1981-12-28 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US5011783A (enExample)
EP (1) EP0084265B1 (enExample)
JP (1) JPS58115832A (enExample)
DE (1) DE3278259D1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3478170D1 (en) * 1983-07-15 1989-06-15 Toshiba Kk A c-mos device and process for manufacturing the same
KR100189966B1 (ko) * 1995-06-13 1999-06-01 윤종용 소이 구조의 모스 트랜지스터 및 그 제조방법
US5914280A (en) * 1996-12-23 1999-06-22 Harris Corporation Deep trench etch on bonded silicon wafer
US6004835A (en) 1997-04-25 1999-12-21 Micron Technology, Inc. Method of forming integrated circuitry, conductive lines, a conductive grid, a conductive network, an electrical interconnection to anode location and an electrical interconnection with a transistor source/drain region
US5891763A (en) * 1997-10-22 1999-04-06 Wanlass; Frank M. Damascene pattering of SOI MOS transistors

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4174217A (en) * 1974-08-02 1979-11-13 Rca Corporation Method for making semiconductor structure
JPS5530623A (en) * 1978-08-25 1980-03-04 Saburo Wakasugi Vibration sensitive warning device
DE3072028D1 (en) * 1979-11-23 1987-10-15 Alcatel Nv Dielectrically insulated semiconductor component and process for its manufacture
US4381201A (en) * 1980-03-11 1983-04-26 Fujitsu Limited Method for production of semiconductor devices
JPS56135969A (en) * 1980-03-27 1981-10-23 Fujitsu Ltd Manufacture of semiconductor device
JPS56144577A (en) * 1980-04-10 1981-11-10 Fujitsu Ltd Production of semiconductor device
JPS56160050A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS577926A (en) * 1980-06-18 1982-01-16 Fujitsu Ltd Manufacture of semiconductor device
US4372990A (en) * 1980-06-23 1983-02-08 Texas Instruments Incorporated Retaining wall technique to maintain physical shape of material during transient radiation annealing
JPS5734331A (en) * 1980-08-11 1982-02-24 Toshiba Corp Manufacture of semiconductor device
US4330363A (en) * 1980-08-28 1982-05-18 Xerox Corporation Thermal gradient control for enhanced laser induced crystallization of predefined semiconductor areas
US4409724A (en) * 1980-11-03 1983-10-18 Texas Instruments Incorporated Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereby
US4448632A (en) * 1981-05-25 1984-05-15 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices
JPS5891621A (ja) * 1981-11-26 1983-05-31 Mitsubishi Electric Corp 半導体装置の製造方法
US4479847A (en) * 1981-12-30 1984-10-30 California Institute Of Technology Equilibrium crystal growth from substrate confined liquid
US4473433A (en) * 1982-06-18 1984-09-25 At&T Bell Laboratories Process for producing dielectrically isolated single crystal silicon devices

Also Published As

Publication number Publication date
JPS58115832A (ja) 1983-07-09
EP0084265A2 (en) 1983-07-27
DE3278259D1 (en) 1988-04-21
EP0084265B1 (en) 1988-03-16
EP0084265A3 (en) 1985-04-17
US5011783A (en) 1991-04-30

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