JPH0334084B2 - - Google Patents
Info
- Publication number
- JPH0334084B2 JPH0334084B2 JP19255984A JP19255984A JPH0334084B2 JP H0334084 B2 JPH0334084 B2 JP H0334084B2 JP 19255984 A JP19255984 A JP 19255984A JP 19255984 A JP19255984 A JP 19255984A JP H0334084 B2 JPH0334084 B2 JP H0334084B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- input
- sequence
- bit
- program
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 15
- 239000000470 constituent Substances 0.000 claims description 3
- 230000015654 memory Effects 0.000 description 17
- 230000000630 rising effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000003936 working memory Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/15—Plc structure of the system
- G05B2219/15107—Linesolver, columnsolver
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Programmable Controllers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19255984A JPS6172303A (ja) | 1984-09-17 | 1984-09-17 | シーケンス論理演算制御方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19255984A JPS6172303A (ja) | 1984-09-17 | 1984-09-17 | シーケンス論理演算制御方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6172303A JPS6172303A (ja) | 1986-04-14 |
JPH0334084B2 true JPH0334084B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-05-21 |
Family
ID=16293289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19255984A Granted JPS6172303A (ja) | 1984-09-17 | 1984-09-17 | シーケンス論理演算制御方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6172303A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2526894B2 (ja) * | 1987-03-30 | 1996-08-21 | オムロン株式会社 | プログラマブル・コントロ−ラの演算装置 |
-
1984
- 1984-09-17 JP JP19255984A patent/JPS6172303A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6172303A (ja) | 1986-04-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6044699B2 (ja) | 特殊アドレス発生装置 | |
US3248698A (en) | Computer wrap error circuit | |
JPS638952A (ja) | メモリのアドレス方法およびこの方法を用いたプロセッサ | |
EP0143351B1 (en) | Memory device with a register interchange function | |
US4101967A (en) | Single bit logic microprocessor | |
JP2878503B2 (ja) | 標準セルとアプリケーションセルと試験セルとを含む集積回路 | |
JPH0334084B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
US4688193A (en) | Bit processing utilizing a row and column ladder sequence | |
US5021990A (en) | Output pulse generating apparatus | |
US5603023A (en) | Processor circuit for heapsorting | |
US5001629A (en) | Central processing unit with improved stack register operation | |
JPS626304A (ja) | シ−ケンス制御用中央処理装置 | |
JPS59123934A (ja) | プログラム可能な論理制御装置 | |
JP2504974B2 (ja) | シ−ケンサの高速演算処理方式 | |
JPS6047612B2 (ja) | マイクロ命令出力制御方式 | |
JPS6217847Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
JP2616714B2 (ja) | 半導体記憶装置 | |
KR900002602B1 (ko) | 마이크로 프로그램 제어장치 | |
SU1003091A1 (ru) | Устройство дл управлени операцией записи | |
JPH0713818B2 (ja) | マイクロプロセッサ | |
JPH01112429A (ja) | マイクロコンピュータ | |
JPS61100802A (ja) | プログラマブルシ−ケンスコントロ−ラの演算処理方式 | |
JPH02183332A (ja) | プログラムド制御方式 | |
JPH02140805A (ja) | シーケンスコントローラ | |
JPH01171054A (ja) | 外部インデックスレジスタ方式 |