JPH0332075B2 - - Google Patents

Info

Publication number
JPH0332075B2
JPH0332075B2 JP60290753A JP29075385A JPH0332075B2 JP H0332075 B2 JPH0332075 B2 JP H0332075B2 JP 60290753 A JP60290753 A JP 60290753A JP 29075385 A JP29075385 A JP 29075385A JP H0332075 B2 JPH0332075 B2 JP H0332075B2
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
substrate
wiring pattern
led light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60290753A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62150382A (ja
Inventor
Shizuo Seki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPON DENYOO KK
Original Assignee
NIPPON DENYOO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPON DENYOO KK filed Critical NIPPON DENYOO KK
Priority to JP60290753A priority Critical patent/JPS62150382A/ja
Publication of JPS62150382A publication Critical patent/JPS62150382A/ja
Publication of JPH0332075B2 publication Critical patent/JPH0332075B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
JP60290753A 1985-12-25 1985-12-25 液晶表示装置 Granted JPS62150382A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60290753A JPS62150382A (ja) 1985-12-25 1985-12-25 液晶表示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60290753A JPS62150382A (ja) 1985-12-25 1985-12-25 液晶表示装置

Publications (2)

Publication Number Publication Date
JPS62150382A JPS62150382A (ja) 1987-07-04
JPH0332075B2 true JPH0332075B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-05-09

Family

ID=17760084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60290753A Granted JPS62150382A (ja) 1985-12-25 1985-12-25 液晶表示装置

Country Status (1)

Country Link
JP (1) JPS62150382A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140082U (ja) * 1984-02-22 1985-09-17 豊田合成株式会社 表示器

Also Published As

Publication number Publication date
JPS62150382A (ja) 1987-07-04

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