JPH03273666A - Manufacture of compound semiconductor device - Google Patents

Abstract

PURPOSE:To obtain sufficient insulating properties required for inter-element isolation with excellent reproducibility by depositing an insulating film on a substrate region except an element region formed onto a compound semiconductor substrate thorugh plasma CVD and positively introducing damage due to the collisions of charged quanta to the compound semiconductor substrate. CONSTITUTION:Silicon ions are implanted selectively to a semi-insulating GaAs substrate 1 while using a resist as a mask to form element regions 3. An insulating film 4 such as a silicon oxide film, a silicon nitride film or the like is deposited on the surface of the GaAs substrate 1, and impurities are activated through heat treatment while using the insulating film 4 as a cap material. A resist mask for inter-element isolation is formed with the insulating film 4 being left as it is, and the insulating film 4 is bored selectively. The resist is removed, and an insulating film 9 such as silicon nitride is deposited while element isolation regions 5 are shaped. Accordingly, the insulating film is deposited by employing plasma CVD, thus introducing physical damage due to the collisions of SiH4 excited by a high-frequency electric field and NH3 plasma to the GaAs substrate at the initial stage of the deposition of the insulating film.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a compound semiconductor device, particularly a method for isolating elements in a semiconductor device using a GaAs substrate. In integrated circuits using selective ion implantation, the elements constituting the integrated circuit are formed by selective ion implantation and heat treatment.The elements are isolated by implanting ions such as '1B' or I60* into the regions between the elements. Figures 2a-d are also cross-sectional views at each step for explaining a method for manufacturing an integrated circuit using a conventional GaAs Schottky gate field effect transistor (hereinafter abbreviated as MESFET).
In the figure, silicon is selectively ion-implanted into a semi-insulating GaAs substrate 1 using a resist 2 as a mask to form an element region 3 (FIG. 2a). An insulating film 4 such as a silicon oxide film is deposited on the surface of the GaAs substrate 1 by CVD or the like, and this is used as a cap material to perform heat treatment for 20 minutes in a nitrogen atmosphere at 800° C. to activate impurities (Fig. 2). b)
.

Next, the insulating film 4 is removed, and a "B" formed with a resist mask for isolation between elements is implanted to electrically isolate the elements (FIG. 2C). Here, 5 is an isolation region between elements.Then, the resist is removed and Au/Ge/Ni
Ti/Pt/Au is deposited by the usual lift-off method and heat treated to form the source electrode 6 and drain electrode 7. In the same way, the Ti/Pt/Au is lifted off to form the gate electrode 8, and a FET (field effect transistor) is formed. Ga
An As integrated circuit is manufactured (FIG. 2d).

Problems to be Solved by the Invention However, with this conventional method, sufficient insulation required for isolation between elements can be obtained with good reproducibility. Means for Solving the Problems Having the Problem that Characteristics Change, The present invention G&
In this method, an insulating film is deposited by chemical vapor deposition (chemical vapor deposition), and good isolation between elements is achieved by actively introducing damage to the compound semiconductor substrate due to the collision of charged quanta. By depositing an insulating film using this method, even if damage caused by collisions of charged particles is introduced to the surface of the GaAs substrate other than the element region, the resistivity of the substrate increases, and isolation between elements can be easily and reliably performed. Embodiment FIGS. 1 a to 1 e are diagrams for explaining an embodiment of the present invention, and show cross-sectional views at each step. First, semi-insulating GaA
Silicon is selectively ion-implanted into the s-substrate 1 using the resist 2 as a mask to form an element region (FET formation region) 3 (
Figure 1 a). Next, an insulating film 4 such as a silicon oxide film or a silicon nitride film is deposited on the surface of the GaAs substrate 1 by CVD or sputtering, and this is used as a cap material and subjected to heat treatment for 20 minutes in a nitrogen atmosphere at 800°C. Activate impurities (Figure 1b). Next, the insulating film 4
A resist mask for isolation between elements is formed while leaving a resist mask remaining, and the insulating film 4 is selectively opened using hydrogen fluoride or the like (FIG. 1C). Next, the resist was removed using micro plasma CVD.
Using a method, an insulating film 9 of silicon nitride or the like is deposited and at the same time an element isolation region 5 is formed (FIG. 1d). By depositing an insulating film using plasma CVD in this manner, physical damage may be introduced to the GaAs substrate by collisions of 5iHa and NH$ plasma excited by a high-frequency electric field at the initial stage of deposition of the insulating film. The specific resistance of the GaAs substrate, which was conventionally about 106 to 10"Ωc111, has increased to more than 101Ωcm, making it easy and reliable to separate elements. Electrode 6
Similarly, Ti/Pt/A also forms the drain electrode 7.
A GaAs integrated circuit is manufactured by lifting off the gate electrode 8 and forming a gate electrode 8 (FIG. 1e). In this example, G
It goes without saying that the present invention is equally effective when using compound semiconductor devices other than MESFETs or compound semiconductor materials other than GaAs.
~ As described in detail of the invention, according to the present invention, during the deposition of an insulating film by plasma CVD, damage is introduced to the compound semiconductor substrate due to the collision of charged particles, and the specific resistance of the GaAs substrate increases, so that the GaAs substrate can be easily and reliably deposited. Although isolation between elements can be achieved,
There is no need for conventional B° or 1.0° ion implantation, and the manufacturing process for GaAs integrated circuits can be simplified.

[Brief explanation of drawings]

Fig. 1 (a?''(e% friend) The cross section for explaining one embodiment of the present invention is Fig. 2 ra) - (d
1 is a cross-sectional view for explaining a method of manufacturing a GaAs integrated circuit using AsMESFET

Claims (1)

[Claims] a step of selectively implanting ions into a compound semiconductor substrate; a step of forming a first insulating film on the compound semiconductor substrate; and a step of heat-treating the compound semiconductor using the first insulating film as a cap material to activate the implanted ions. a step of forming an element region by
a step of selectively removing an insulating film, and forming a second insulating film using plasma CVD and at the same time damaging the substrate from which the first insulating film has been removed by collisions of charged particles. A method for manufacturing a compound semiconductor device, comprising the step of forming an isolation region.