JPH03257846A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to reduce leakage currents between impurity diffusion devices and suppress the reductions of channel widths by performing channel stopper implantations after forming field insulating films. CONSTITUTION:A field oxide film 6 is formed on a P-type silicon substrate 1 as a field insulating film by a selectively oxidizing method and without performing any channel stopper implantation. Thereafter, a gate oxide film 7, a gate electrode 8 and source, drain regions 9, 9 are formed. Then, the regions, in which no channel stopper implantation is performed, are covered with photoresist 4, and the channel stopper implantation is performed on the conditions of P<+> and 1X10<-12>cm<-3> by utilizing a high accelerating energy or divalent phosphorus and with the energy of about 250KeV. In this manner, channel stoppers 5 are formed. Since the surface regions of the channel stoppers are not oxidized, no crystal defect is formed. Thereby, junction leakages are reduced. Also, since the number of the process of heat treatments after implanting the channel stoppers is reduced in comparison with the number of usual ones, diffusion in lateral directions is suppressed.

Description

[Detailed description of the invention] Industrial applications The present invention relates to manufacturing semiconductor devices.

2. Description of the Related Art A conventional manufacturing method will be described with reference to step-by-step sectional views of an N-channel MOS transistor shown in FIGS. 2(a) to 2(d).

First, a protective oxide film 2 and a silicon nitride film 3 are formed on a P-type silicon substrate 1, and then a photoresist 4 is formed in a region other than the region to be selectively oxidized (FIG. 2(a)).

Next, using the photoresist 4 as a mask, P+ implantation was performed at 100 KeV to form an impurity region (hereinafter referred to as a channel stopper) for preventing the generation of a parasitic channel.
I x 10I2c+s'' to form a channel stopper 5 (FIG. 2(b)).Next, the photoresist is removed and a field oxide film 6, which will become a field insulating film, is formed, followed by nitride and protective oxidation. The film is removed, and then a gate oxide film 7 is formed (see FIG. 2 (
C)).

FIG. 2(d) shows that the gate electrode 8. After forming the source/drain regions 9, the interlayer insulating layer 10. An electrode 11 is formed to form a completed N-channel transistor.

FIG. 2(e) is a sectional view of FIG. 2(d) taken along Y-Y'.

Problems to be Solved by the Invention In such a conventional method, leakage occurs due to the formation of defects at the interface between the channel stopper 5 and the source/drain region 9. Further, there was a problem in that the gate width became narrower (it became narrower by twice ΔW in FIG. 2(e)) due to the lateral diffusion of the channel stopper.

Means for Solving the Problems A method of manufacturing a semiconductor device according to the present invention involves implanting a channel stopper after forming a field insulating film.

According to the method for manufacturing a semiconductor device of the present invention, the surface region of the channel stopper is not oxidized after the channel stopper is implanted, so that no crystal defects are formed, thereby reducing junction leakage. Further, since the number of heat treatment steps after implanting the channel stopper is reduced compared to the conventional method, lateral diffusion is suppressed.

Embodiment An embodiment of the method for manufacturing a semiconductor device according to the present invention is shown in FIG.
This will be explained with reference to step-by-step cross-sectional views of the N-channel MOS transistor shown in a) to (C). In FIG. 1, the same parts as in FIG. 2 are given the same numbers.

First, a field oxide film 6 is formed as a field insulating film on a P-type silicon substrate 1 by selective oxidation without channel stopper implantation, and then a gate oxide film 7 is formed as a field insulating film.
．． Gate electrode 8. sauce.

A drain region 9 is formed (FIG. 1(a)).

Next, the area where channel stopper implantation is not performed is covered with photoresist 4, and channel stopper implantation is performed at p'', l.
Under the conditions of X I Q12c + 1-3, using high acceleration energy (about 500 KeV) or divalent phosphorus,
This is done with an energy of about 0 KeV (Fig. 1(b)).

The channel stopper 5 is now formed.

Thereafter, an N-channel transistor completed using a method similar to the conventional method is shown in FIG. 1(C).

FIG. 1(d) is a sectional view taken along Y'-Y of FIG. 1(C).

In this embodiment, the case of N-channel MO3 has been explained, but it goes without saying that P-channel MO8, complementary MOS, etc. can also be used.

Effects of the Invention According to the method for manufacturing a semiconductor device of the present invention, it is possible to reduce leakage current between impurity diffusion layers and suppress reduction in channel width due to diffusion of a channel stopper, so that good device characteristics can be obtained. .

[Brief explanation of drawings]

FIG. 1 is a process sectional view of an N-channel MOS transistor showing an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIG. 2 is a process sectional view of a conventional N-channel MOS transistor. 1... P-type silicon substrate, 5... Channel stopper, 6... Field oxide film.

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device, comprising forming a field insulating film on the surface of a semiconductor substrate, and then performing ion implantation to prevent generation of a parasitic channel.