JPH0323970U - - Google Patents
Info
- Publication number
- JPH0323970U JPH0323970U JP1989083052U JP8305289U JPH0323970U JP H0323970 U JPH0323970 U JP H0323970U JP 1989083052 U JP1989083052 U JP 1989083052U JP 8305289 U JP8305289 U JP 8305289U JP H0323970 U JPH0323970 U JP H0323970U
- Authority
- JP
- Japan
- Prior art keywords
- micro
- board
- printed circuit
- multilayer printed
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 7
- 238000010030 laminating Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
第１図ａ，ｂ，ｃは本考案の多層プリント回路
基板の一実施例の構成を示すもので、ａは多層プ
リント回路基板表面のフラツトパツケージ型ＩＣ
が実装された部分の平面図、ｂは第１図のＡ−Ａ
線における断面図、ｃは多層プリント回路基板の
導体層の平面図、第２図ａ〜ｆは本考案の多層プ
リント回路基板に設ける導体層除去部分な種々の
例を示す説明図、第３図ａ，ｂ，ｃは従来の多層
プリント回路基板の一例の構成を示すもので、ａ
は多層プリント回路基板表面のフラツトパツケー
ジ型ＩＣが実装された部分の平面図、ｂは第１図
のＡ−Ａ線における断面図、ｃは多層プリント回
路基板の導体層の平面図である。
１，７……回路パターン、２，４，６……絶縁
層、３，５……導体層、８……従来の導体除去部
分、９……本考案の導体除去部分、１０……本考
案の多層プリント回路基板、１１……微小間隔回
路パターン、２０……フラツトパツケージ型ＩＣ
、２１……電極端子。
Figures 1a, b, and c show the structure of an embodiment of the multilayer printed circuit board of the present invention, and a shows a flat package type IC on the surface of the multilayer printed circuit board.
A plan view of the part where is mounted, b is A-A in Fig. 1
2 is a cross-sectional view along the line, c is a plan view of the conductor layer of the multilayer printed circuit board, FIGS. a, b, and c show the configuration of an example of a conventional multilayer printed circuit board;
1 is a plan view of a portion of the surface of the multilayer printed circuit board on which a flat package type IC is mounted, b is a cross-sectional view taken along line A--A in FIG. 1, and c is a plan view of a conductor layer of the multilayer printed circuit board. 1, 7... Circuit pattern, 2, 4, 6... Insulating layer, 3, 5... Conductor layer, 8... Conventional conductor removed portion, 9... Conductor removed portion of the present invention, 10... Present invention multilayer printed circuit board, 11...micro-spaced circuit pattern, 20...flat package type IC
, 21...electrode terminal.
Claims (1)
積層して多層基板とし、この基板の少なくとも一
方の表面に微小間隔端子群を持つ実装部品を半田
付けするための微小間隔回路パターンを形成した
多層プリント回路基板において、 前記微小間隔回路パターンの裏側に位置する前
記導体層は非弧立状態で残し、前記微小間隔回路
パターンと微小間隔回路パターンとの間の裏側に
位置する前記導体層は光が透過する状態で除去し
たことを特徴とする多層プリント回路基板。[Claims for Utility Model Registration] A multilayer board is formed by laminating a plurality of insulating layers and conductor layers made of a translucent material, and a mounted component having a group of terminals at minute intervals is soldered to at least one surface of this board. In the multilayer printed circuit board on which micro-spaced circuit patterns are formed, the conductor layer located on the back side of the micro-spaced circuit patterns is left in a non-upright state, and the conductive layer between the micro-spaced circuit patterns is formed. A multilayer printed circuit board, characterized in that the conductive layer located on the back side is removed in a state in which light is transmitted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989083052U JPH0323970U (en) | 1989-07-17 | 1989-07-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989083052U JPH0323970U (en) | 1989-07-17 | 1989-07-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0323970U true JPH0323970U (en) | 1991-03-12 |
Family
ID=31630401
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989083052U Pending JPH0323970U (en) | 1989-07-17 | 1989-07-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0323970U (en) |
-
1989
- 1989-07-17 JP JP1989083052U patent/JPH0323970U/ja active Pending