JPH03230543A - Inspecting method of semiconductor device - Google Patents

Abstract

PURPOSE:To easily discover defective regions of a semiconductor device in a short time, by forming a monitor pattern for reading coordinates capable of specifying inspection positions, inside or in the vicinity of a test pattern in a semiconductor device. CONSTITUTION:In the inside or the vicinity of a test pattern 21, a monitor pattern 22 for reading coordinates capable of specifying inspection positions is formed. Optical processing containing the monitor pattern 22 is combined with a hologram, and defects of a semiconductor device are inspected by performing the combined optical processing. Thus a monitor pattern 22A appears in the inspected results. Thereby the coordinates of a defective region 7A can be immediately specified, so that defective regions in the semiconductor device are easily discovered in a short time.

Description

[Detailed Description of the Invention] [Summary] An object of the present invention is to provide a method for testing a semiconductor device, which makes it easy to find defective areas in a semiconductor device, takes a short time, and improves the work efficiency of the test. A semiconductor device inspection method in which a test pattern that repeats a predetermined pattern is formed on a semiconductor device, and an optical process that combines optical processing and hologram is performed on the test pattern to inspect the semiconductor device for defects. In the method, a monitor pattern for successive coordinates that can specify the inspection position is formed inside or near the test pattern in the semiconductor device, and the optical processing is performed including the monitor pattern to detect defects in the semiconductor device. Configure to inspect.

(Industrial Application Field) The present invention relates to a semiconductor device testing method, and more particularly to a semiconductor device testing method that improves a test pattern for semiconductor IC device testing.

In recent years, ICs are required to have increasingly finer patterns in order to achieve higher integration, higher speed, etc. than ever before. At the same time, in order to obtain ICs with high yield and reliability, it is required to further suppress pattern defects, foreign matter adhesion, etc. on wafers during the manufacturing process. To achieve the latter, it is necessary to improve the level of detection of pattern defects, foreign matter, etc. on the wafer during the manufacturing process, perform early feeding, and pursue the causes and take countermeasures and improvements.

[Prior Art] In the conventional automatic defect inspection of patterned wafers, the following technology is used for boat fishing.

1) White light image processing technology 11) Laser light scattering technology ji) Technology that combines both optical processing and holograms, and a device using these technologies to print the product device itself or a simple unit test pattern onto a wafer, Thereafter, the etched wafer is inspected, and a metallurgical microscope or observation SEM is used to investigate the defect root in more detail. Note that test patterns are printed on wafers and the like for inspection purposes, and when defects are detected, these patterns are regular and do not appear optically to the outside.

Here, the principle of the apparatus using the technique (iii) above is shown as shown in FIG. configured. When parallel light 6 is applied to the diffraction grating 1, all the light is diffracted by the regular pattern of the diffraction grating 1 and proceeds to the Fourier transform lens 2.
Focus on spatial filter 3. At this time, since there is no defect in the diffraction grating 1, nothing appears on the screen 5.

On the other hand, if there is a defect 7 in the diffraction grating 1 as shown in FIG. Screen 5 through inverse Fourier transform lens 4
Defect image 8 is connected to . Therefore, the presence of a defect 7 that disturbs the regular diffraction arrangement can be detected.

In practice, for example, a test pattern 11 shown in FIG.
, and check the resolution. In addition, the test pattern 11 also has the function of checking the (1) IA pattern (blanking pattern for contact). Further, as shown in FIG. 10, a line/space pattern 12 for wiring short check is formed.

(Problem to be Solved by the Invention) However, in such a conventional semiconductor device inspection method, especially when defect detection is performed using an apparatus using the technique (iii) above, the test pattern is the 9th. 1
As shown in Figure 0, each method needs to have a repeating pattern based on a certain standard, which makes it difficult to find defective areas, and it also takes a lot of time and reduces inspection efficiency. there were.

That is, normally, after inspecting using the above device, the defect area is inspected in more detail using a metallurgical microscope or observation SEM. Even if the accuracy of each readout function is high, it is quite difficult to match different types of devices depending on how the X and Y coordinates are specified, and therefore finding a defective area becomes difficult and takes a lot of time. As a result, inspection work efficiency deteriorates.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device inspection method that makes it easy to find a defective area of a semiconductor device, takes a short time, and improves inspection work efficiency.

[Means to solve the problem]

In order to achieve the above object, the semiconductor device inspection method according to the present invention forms a test pattern that repeats a predetermined pattern on a semiconductor device, and performs optical processing on the test pattern using a combination of optical processing and hologram. In a semiconductor device inspection method for inspecting defects in a semiconductor device, a monitor pattern for successive coordinates that can specify an inspection position is formed inside or near a test pattern in the semiconductor device, and the optical system including the monitor pattern is The semiconductor device is configured to perform physical processing to inspect semiconductor devices for defects.

(Function) In the present invention, a monitor pattern for successive coordinates that can specify the inspection position is formed inside or near the test pattern, and optical processing that combines optical processing and hologram is performed using the monitor pattern. , semiconductor devices are inspected for defects.

Therefore, since the monitor pattern appears in the test results,
From this, the coordinates of the defective area can be immediately identified, so that
This makes it easier to find defective areas in semiconductor devices and can be done in a shorter amount of time.

〔Example] Hereinafter, the present invention will be explained based on the drawings.

1 to 6 are diagrams showing an embodiment of the semiconductor device testing method according to the present invention. FIG. 1 shows a test pattern formed on a semiconductor device (for example, a wafer), and in the figure, 21 is the test pattern. The test patterns 21 are used for checking the resolution as in the conventional example, and are regularly arranged in a grid pattern. A monitor pattern 22 is formed in the vicinity of the test pattern 21, and the monitor pattern 22 is provided for successive coordinates that can specify the inspection position.

As another example, as shown in FIG. 2, for example, a line/space pattern 31 for wiring short check is formed on a semiconductor device, and a monitor pattern 32 is formed inside this line/space pattern 31. Both of the monitor patterns 22 and 32 deviate from regular repeating patterns.

After the above processing, the semiconductor device is inspected for defects by performing optical processing using a combination of optical processing and hologram in an apparatus using the measurement principle shown in FIG. 7 as a conventional example. At this time, in this embodiment, the light of the monitor patterns 22 and 32 is disturbed in the same manner as the original defect pattern and is no longer focused on the spatial filter 3, and is imaged as a hologram image on the screen 5 through the inverse Huo conversion lens 4. be done. Therefore, these holograms (&7 A, 228,
For example, for the monitor pattern 22 in FIG. 1, a hologram image 22A as shown in FIG. 3 appears. This hologram image may be projected on the TV screen.
Further, the test pattern itself may be displayed on the TV screen at the same time, and in either case, the coordinates of the defect 7 can be very easily confirmed from the hologram images 22A and 32A of the monitor pattern 22.32. Therefore, when finding a defective area using a metallurgical microscope or an observation SEM, the hologram images 22A, 32A of the monitor pattern 22.
In addition to being able to easily identify the location, inspection can be carried out in a short time, and work efficiency can be improved.

In addition, in order to easily read the coordinates on the wafer, the inserted monitor pattern may include numbers indicating the coordinates, or alternatively, a special pattern (shape pattern, barcode pattern, etc.) may be inserted. good. Alternatively, it may simply be a robin pattern or a circle pattern.

Furthermore, if you do not want to data out the number of defects when detecting defects in the monitor pattern to be inserted, you can create a program that erases the inserted monitor area using computer software in advance, or scan it with a laser. Just try not to do that.

Further, counting of monitor patterns may be stopped to prevent defects from being counted up.

Here, to explain a specific example of an apparatus that performs the above processing, FIG. 4 shows a conventional example in which the inverse Fourier transform lens 4 and screen 5 in FIG. 7 are removed, and a hologram photosensitive plate 41 is placed in that position. A photosensitive plate 41 is irradiated with a reference beam 42 to record defect information as a hologram.

In FIG. 5, a reproduction TV monitor 43 is placed at the position of the diffraction grating, and a hologram photosensitive plate 41 on which defect information is recorded is placed in the same position as when it was recorded. It is used to irradiate light and regenerate it.

FIG. 6 shows an example of application to actual wafer inspection. Parallel light 51 is irradiated onto a wafer 53 via a beam splitter 52, and reflected light from the wafer 53 is passed through a Fourier transform lens 54 and a spatial filter 55 to form a hologram. You can receive it on screen 56. A test pattern and a monitor pattern are formed on the wafer 53, which functions as a diffraction grating and constitutes a reflective optical system. Further, the spatial filter 55 and the hologram screen 56 constitute a hologram creation system, and the above processing is performed by irradiating the hologram screen 56 with reference beams 57 and 58 for recording and reproduction, respectively.

Note that the application of the present invention is not limited to wafers, but can be applied to all other semiconductor devices and equipment, such as masks and reticles typically used for exposure, as long as they are inspected using test patterns. can do.

Furthermore, the technique of the present invention can be applied not only to the formation of test patterns but also to actual devices.

〔Effect of the invention〕

According to the present invention, defective areas of semiconductor devices can be easily removed.
Moreover, it can be found in a short time, and the work efficiency of defect inspection can be improved.

[Brief explanation of drawings]

1 to 6 are diagrams showing an embodiment of the semiconductor device testing method according to the present invention. Figure 3 is a diagram showing the hologram image of the monitor pattern, Figure 4 is a diagram explaining the configuration of recording the defect information, and Figure 5 is the defect information recorded by the hologram. FIG. 6 is a diagram illustrating the configuration of the regeneration system, FIG. Figure 8 is a diagram showing the configuration of defect information inspection, Figure 8 is a diagram explaining the operation of defect information inspection using the hologram, Figure 9 is a diagram showing the test pattern for the resolution check, and Figure 10 is the diagram. FIG. 3 is a diagram showing a line/space pattern for wiring short check. 1...Diffraction grating, 2.54...Fourier interchangeable lens, 3.55.
...Spatial filter, 4...Inverse Fourier interchangeable lens, 5...
Screen, 6.51... Parallel light, 7... Defect, 21... Test pattern, 22.32... Monitor pattern, 31...
... Line space pattern, 41 ... Hologram photosensitive plate, 42.44.57.58 ... Reference light, 43 ...
... TV monitor for reproduction, 52 ... Beam splitter, 53 ... Wafer, 56 ... Hologram screen. 22 Figure 1 shows a test pattern for resolution check of an embodiment - Figure 3 shows a hologram image of a monitor pattern of an embodiment Figure 4 illustrates the configuration for recording defect information in an example.A national policy diagram explains the configuration for reproducing defect information using a hologram in an example.The same figure illustrates the configuration for inspecting defect information using a conventional hologram. Diagram explaining the action of defect inspection

Claims (1)

[Claims] A semiconductor device that forms a test pattern that repeats a predetermined pattern on a semiconductor device, and performs optical processing using a combination of optical processing and hologram on the test pattern to inspect the semiconductor device for defects. In the inspection method, a monitor pattern for reading coordinates that can specify the inspection position is formed inside or near the test pattern in the semiconductor device, and the optical processing is performed including the monitor pattern to inspect the semiconductor device. A method for inspecting a semiconductor device, characterized in that it inspects for defects.