JP2822937B2 - Semiconductor device manufacturing system and defect inspection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing system and a defect inspection method for manufacturing a semiconductor device by processing an LSI wafer in a plurality of steps.

[0002]

2. Description of the Related Art In a conventional semiconductor device manufacturing system, foreign matters, discoloration defects,
2. Description of the Related Art An appearance defect inspection apparatus that detects a defect such as a shape defect from the appearance has been used off-line separated from a semiconductor manufacturing line. Examples of the visual inspection apparatus used in this manner include, for example, IEICE Technical Report VOL. 8
7, No. 132 (1987), pages 31 to 38 are known. That is, in FIG. 23, the circuit pattern on the wafer 1 illuminated by the lamp 2 is enlarged and detected by the image sensor 4 via the objective lens 3, and a grayscale image of the circuit pattern is obtained. In the defect determining circuit 6, the detected grayscale image is stored in the image memory 5, the immediately preceding chip 7 a
The defect is determined by comparing the image with the image of the (adjacent chip). The detected image is simultaneously stored in the image memory 5 (stored image) and used for the comparative inspection of the next chip 7b.

FIG. 24 shows an example of defect determination. The alignment circuit 6a aligns the detected image with the stored image, and detects a difference image between the detected image and the stored image aligned by the difference image detection circuit 6b. This is converted to a binarization circuit 6c.
The defect is detected by binarizing the data. With the above configuration, the missing portion 8d existing in the detected image is detected.

Also, related to this type of apparatus are, for example, SPI, Optical Microlithography VI (1987), pp. 248 to 255 (S
PIE Vol. 772 Optical Microlithography
VI (1987) pp. 248-255).

[0005]

The above-mentioned prior art detects a mismatch of a corresponding pattern as a defect. Therefore, if the detected defect is not observed by other observation means, for example, an optical microscope or an SEM, the shape of the defect is detected. Defects, discoloration,
There has been a problem that the type of a defect such as a foreign substance cannot be identified, and a wafer processing apparatus that is a source of the defect cannot be finely managed.

An object of the present invention is to accurately grasp the state of each processing apparatus by discriminating defects occurring on a wafer in a process of manufacturing an LSI wafer into fatal defects and non-fatal defects. And a defect inspection method.

[0007]

According to the present invention, there is provided a semiconductor device manufacturing system for manufacturing a semiconductor device by processing a substrate to be processed in a plurality of steps. Detecting means for detecting a defect on a substrate to be processed before and after a predetermined step of a plurality of steps to be performed, and identifying a defect generating step by comparing a defect occurrence state based on an output signal from the detecting means. And a determination unit for performing the determination.

[0008]

In the inspection pattern of the LSI wafer, defects such as foreign matter, discoloration defect, and shape defect are detected, and the wafer is traced to perform inspection and defect classification for each processing apparatus.
Check how defects are generated through each processing unit by checking the coordinates of the defects (positions where the defects occur on the wafer), and identify defects as fatal and non-fatal By determining the criticality of the defect, the state of each processing apparatus can be accurately grasped.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an appearance inspection apparatus used in a semiconductor manufacturing system according to the present invention will be described below with reference to FIG. The circuit pattern on the wafer 1 illuminated by the Xe lamp 12 is enlarged and detected by the TV camera 13 via the objective lens 3. The output of the TV camera is converted into a digital signal by the A / D converter 14. Any type of photoelectric converter can be used, such as a TV camera and a linear image sensor. In the case of a linear image sensor, the two-dimensional pattern of the wafer is detected by the self-scanning of the sensor and the xy table moving in a direction perpendicular to the self-scanning. I do. The detected grayscale image is compared with the image of the immediately preceding chip stored in the image memory 15a, and the defect is determined. That is, FIG.
As shown in (1), a defect is detected by detecting the circuit pattern at the position 7d inside the chip 7 on the wafer and comparing it with the circuit pattern at the corresponding position 7c of the adjacent chip stored in the image memory 15a. .

First, the detected image (a) and the stored image (b) as shown in FIG. 3 are aligned (FIG. 3 (c)) by the alignment circuit 16 of FIG. The difference image between the detected image and the stored image aligned by the circuit 17 is detected (difference image (d) in FIG. 3). This difference image (d) is binarized by the binarization circuit 18 in FIG.
The value image (e) is obtained. Thus, the disconnection 8b of the pattern existing in the detected image (a) is detected as a defect. The image obtained by detecting the circuit pattern at the position 7d is newly stored in the image memory 15a, and is used for the inspection of the position 7e of the next chip.

In FIG. 2, when the defect is located at the position 7d, the defect is detected both in the comparison between 7c and 7d and in the comparison between 7d and 7e. Which chip has a defect can be specified. This collation is performed by the CPU 31 of FIG.

According to the signal from the binarization circuit 18, the position 7
When it is determined that there is a defect in d, the wafer is moved by the Z control circuit 19 for moving the wafer up and down, an image of the defective portion 7d is detected at each Z position, and the image is stored in the image memory 15a.
To memorize. The xy control circuit 2 moves the wafer in the xy directions.
0, a non-defective part corresponding to the defective part, for example, position 7c
The image of the non-defective part is detected at each Z position similarly to the defective part 7d, and the image is stored in the image memory 15b. Aligning images of non-defective portion in the alignment circuit 21a Z = Z ₁ stored in the image and the image memory 15b of the defect in the Z = Z ₁ stored in the image memory 15a in. The difference image detection circuit 22a detects a difference image of the aligned image, and the maximum value detection circuit 23a detects a gray value of a defective portion of the difference image.

FIG. 4 shows this state. The image (a) of the defective part and the image (b) of the non-defective part are aligned, and a difference image (c) is obtained. The maximum value detection circuit 23a detects the maximum value of shading in the difference image (c). Defect 8b
Has a large difference in shading from the non-defective part, so that the maximum value detection circuit 23a can detect the shading difference of the defect 8b from the non-defective part.

Similarly, the images of the defective part and the non-defective part at each of the Z ₂ -Zn positions stored in the image memories 15a and 15b are aligned by the alignment circuits 21b... 21n, and the difference image detection circuits 22b. A difference image is detected and a maximum value detection circuit 2
At 3b... 23n, the gray value of the defective portion of the difference image is detected.
The image memories 15a and 15b have, for example, 1024 × 10
A gray image of 24 pixels is stored for each of n images.

The image memory 15a has a capacity capable of storing one gray-scale image for normal defect determination in addition to the above-mentioned multi-focus image storage. This makes it possible to realize a sequence of alternately performing defect determination and defect classification, which will be described later.

Further, the image of the defective part and the image of the non-defective part at Z = Z ₀ are registered by an alignment circuit 24, and the primary differentiation of each image is obtained by a primary differentiation circuit 25a. Is obtained by the difference image detection circuit 26a, and then the maximum value detection circuit 27a detects the density value of the defective portion of the difference image. Similarly,
The image of the defective part and the image of the non-defective part are calculated by the second differentiating circuit 25b
The next differentiation is performed, these difference images are detected by the difference image detection circuit 26b, and the gray value of the difference image is detected by the maximum value detection circuit 27b.

All of these detected values are input to the defect classification circuit 30. The defect classification circuit 30 determines the type of the defect as shown in FIG. 5 based on FIGS. These are realized by software.

Next, the operation of the visual inspection apparatus will be described.

The objective lens 3 has an NA of, for example, 0.8
A large value such as と い っ た 0.95, high resolution and shallow depth of focus are selected. When a defect is detected, the wafer is moved up and down at intervals of, for example, 0.2 μm using the objective lens having a small depth of focus, and an image focused on only a certain plane is detected. When an image is detected in a range of ± 0.6 μm, seven sets of images are detected.

Alignment of the image of the defective part with the image of the non-defective part is performed by the alignment circuits 16, 21a to 21n, 24. This is performed, for example, in IEICE Technical Report Vol. 132 (1987), pp. 31-38. After detecting the difference image of the 7 sets of aligned images,
When the density value is detected, if the defect is a foreign matter, as shown in FIG. 16, Z ₁ and Z ₂ above the focal plane Z ₀ also have relatively large density values. According to the flow shown in (1), it can be easily determined whether or not the foreign matter exists.

The differentiation of the image is performed by a differentiating circuit 25. For example, as shown in FIG. 6, the secondary differentiation is performed by applying four types of edge operators [1-21] to the image and detecting their maximum values. This can be achieved by performing

FIG. 7 shows a specific configuration of the secondary differentiating circuit 25b. In FIG. 7A, the position adjustment circuit 24
For example, an 8-bit digital image signal is received by a three-stage shift register 250, and the outputs of the first and third stages are added to an adder 2.
At 51, the output of the second stage is provided to a gain of two amplifier 252, respectively. Output of adder 251 and amplifier 252
Is applied to a subtractor 253. Shift register 250, adder 251, amplifier 252, and subtractor 253
Thus, an operator "1, -2, 1" is configured.

FIG. 7B is a circuit for differentiating in eight vertical, horizontal and oblique directions. The output of the positioning circuit 24 is 3 × 3.
In addition to the extracting circuit 254, three pixels of vertical, horizontal and oblique are selected and added to the four operators OP1 to OP4 to differentiate the image signal. Each operator may be the same as that shown in FIG. The four operator outputs are applied to a maximum value detection circuit 255, from which the maximum value is detected.

When the difference image is detected after the differentiation, the gradation value becomes a waveform as shown in FIG. 17, and if the defect is discolored, the gradation value becomes smaller. Therefore, the defect classification circuit 30 follows the flow shown in FIG. It is easy to determine whether the color has changed.

FIG. 18 shows a processing flow. The horizontal axis indicates time. In the figure, image detection and defect determination are repeatedly performed, and inspection is performed. Image detection is performed using the T shown in FIG.
The defect determination is performed by the V camera 13, the A / D converter 14, and the image memory 15a, and the defect determination is performed by the alignment circuit 16, the difference image detection circuit 17, the binarization circuit 18, and the CPU 31 that specifies the defect position. When a defect is detected, the inspection is interrupted, and a multi-focus image of the defective part and the corresponding non-defective part is detected. This image detection is performed using the TV camera, the A / D converter 14, and the image memories 15a and 15b. Next, a difference image and a maximum value between these images are detected.
, 21n, 24, difference image detecting circuits 22a,..., 22n, 26a, 26b, differentiating circuits 25a, 25b, and maximum value detecting circuits 23a,.
3n, 27a and 27b. When all of the maximum value at each Z position and the maximum value of the differential image of the differential image are detected, defect classification is performed, and the defect classification circuit 30 classifies the defect as a foreign substance, discoloration, or shape defect. Then, image detection and defect determination are performed again until the defect is detected.

FIG. 22 shows the defects existing on the pattern to be inspected on the wafer. That is, the defects to be detected include the blister 8a of the circuit pattern, the disconnection 8b, and the short 8
c, shape defect 8 such as chip 8d, discoloration defect 9 and foreign matter 1
0.

In the appearance inspection apparatus used in this embodiment, the inspection sequence of detecting and classifying defects has been described. However, as shown in FIG. 19, for example, all defects are detected for one wafer, and Position coordinates in CPU3
1, the defect may be sequentially called after the inspection and the defect may be classified based on the stored information.

As shown in FIG. 21, defect detection and defect classification can be performed by another optical system, and defect detection can be performed accurately at low magnification at high speed and defect classification at high magnification. The lighting can be applied to any structure.

FIG. 8 shows another embodiment of the multifocal image detection in the appearance inspection apparatus used in the semiconductor manufacturing system according to the present invention. The wafer 1 by the Z control circuit 19 instead of up and down movement, a plurality of TV cameras 13a, 13b ... was prepared, by placing this apart optical path gradually focusing plane Z _3, ..., Z _{- 3} It is also possible to obtain a plurality of images simultaneously.

FIG. 9 shows the overall configuration of a visual inspection apparatus using another embodiment of the multi-focus image detection of FIG. 8 described above.
In the figure, an image at the focal point is obtained by a camera 13a, passes through an A / D converter 14a, and is input to an image memory 15a and a positioning circuit 16 for use in defect determination. At the time of defect classification, all images obtained by the cameras 13a to 13n are simultaneously input to the image memories 15a and 15b. Therefore, it is assumed that the image memory can simultaneously write n images. Where r
Ead only has to read images one by one.

The discoloration can be determined by another configuration. In FIG. 1, the image is differentiated to determine the discoloration. However, as described on page 17 and 18 of the image recognition theory (Corona), Can be emphasized by performing a Fourier transform, applying a filter thereto, and then performing an inverse Fourier transform. Using this, it is possible to detect a difference image between the defective part and the non-defective part and discriminate a discoloration defect based on the magnitude of the shading value.

Further, it is also possible to determine a discoloration defect by optical means. 10, a lamp 32, a condenser lens 33, a narrow-band filter 34 (wavelength λ ₁ ) for selecting a wavelength for dark-field illumination, a ring-shaped aperture slit 35, a ring-shaped mirror 36, a parabolic concave mirror 37 as a dark-field illumination system. A lamp 38, a condenser lens 39, a wavelength selection filter 40 (wavelength λ ₂ ) as a bright field illumination system,
In an image detection system including a circular aperture slit 41, a half mirror 42, an objective lens 43, a wavelength separation mirror 44, a dark field detection TV camera 45, and a bright field image detection TV camera 46, the dark field illumination is a filter 34. the limited wavelength lambda _1, is illuminated from the surrounding oblique direction on the pattern by the parabolic concave mirror 37. Bright field illumination is limited to a wavelength λ ₂ by the filter 40 and is illuminated from above. The dark-field image of the defective part and the dark-field image of the non-defective part are detected, and they are aligned by the alignment circuit 24a shown in FIG. 11, and the difference image is detected by the difference image detection circuit 26a.

Similarly, the bright-field image of the defective part and the bright-field image of the non-defective part are detected, these are aligned by the alignment circuit 24b, and the difference image is detected by the difference image detection circuit 26b. When the maximum value detection circuits 27a and 27b detect the gray values of these difference images, as shown in FIG. 12, when the defect is discolored, the gray value during dark-field illumination is smaller than that of a shape defect or foreign matter. Discoloration can be easily determined in the defect classification circuit 30. In the figure, a positioning circuit 16, a difference image detecting circuit 17, and a binarizing circuit 18 are for normal defect determination.

As another embodiment, the components shown in FIG. 13 may be used in place of the dark field image detection.

In FIG. 13, S-polarized lasers 47a and 47a, 4
7b, the wafer 1 is irradiated with the S-polarized laser light at an angle ψ. ψ is about 1 degree. Here, the polarized light that oscillates perpendicularly to the plane formed by the irradiation laser light and the wafer normal is called S-polarized light, and the polarized light that oscillates parallelly is called P-polarized light. At this time, among the circuit patterns on the wafer having a low step, the scattered light does not change its polarization direction, and the objective lens 4 remains in the S-polarized state shown by the solid line.
Although proceeding to 8, the laser light hitting a foreign substance or a circuit pattern having a high step changes the polarization direction, and thus contains a large amount of P-polarized light components indicated by dotted lines. Therefore, the objective lens 48
A polarizing plate 49 for blocking S-polarized light is provided at the back of the device, and the light passing through the polarizing plate 49 is detected by the photoelectric element 50, thereby detecting foreign matter and scattered light from a circuit pattern edge having a high step. The scattered light signal is converted into a digital signal by the A / D conversion circuit 14. The detected signal is stored in the image memory 15
Compare with the signal of the previous chip stored in a.
That is, these signals are aligned by the alignment circuit 24a, and the difference signal is detected by the difference signal detection circuit 26a. Since the scattered light signal from the edge of the circuit pattern having a high step is commonly included in the two signals, the difference signal includes only the scattered light signal from the foreign matter. By binarizing the difference signal by the binarization circuit 27a, foreign matter can be detected, and defect classification can be performed.

Next, a semiconductor device manufacturing system using the above-described appearance inspection apparatus according to the present invention will be described with reference to FIG.

The circuit pattern on the wafer is divided into a plurality of devices A,
B,... E are sequentially formed. Wafers are tracked by the appearance inspection apparatus having this configuration, and inspection and defect classification are performed for each apparatus. By checking the coordinates of the defect, it is possible to find out how the defect occurs through each device.
For example, a wafer processed by the apparatus B is inspected, and the detected defect is composed of a defect brought in from the previous apparatus A and a defect generated in the apparatus B. The defect data obtained by the inspection after the processing by the apparatus A is obtained. By comparing with, it can be determined whether the defect occurs in the device B or is a defect brought in from the preceding device. Here, among the defects brought in from the previous apparatus A, some foreign substances do not cause a shape defect or discoloration in the apparatus B, and a pattern to which a fatal foreign substance adheres must be a shape defect or discoloration in the subsequent apparatus. However, the pattern to which non-fatal foreign matter adheres does not become a shape defect or the like even after passing through the subsequent apparatus, and is a good product. Therefore, the coordinates of a defect classified as a foreign substance by the visual inspection apparatus having this configuration are stored, and after the wafer has passed through the next apparatus, the defect is detected and classified again, so that the fatality of the foreign substance is obtained. Can be determined. This makes it possible to more accurately grasp the state of the manufacturing apparatus.

FIG. 20 shows a configuration in which the appearance inspection apparatus determines the fatality of a foreign substance in the above-described semiconductor manufacturing system according to the present invention. Referring to FIG.
, And the coordinates are stored in the defect attribute storage unit 42. For the detected defect, the defect classification unit 4
The defect is classified into a foreign substance and other types by 1 and stored in the defect attribute storage unit 42 in pairs with the coordinates. Next, the same wafer as described above after the next process is inspected, defect determination and defect classification are similarly performed, and defect coordinates and types are stored in the defect attribute storage unit 42. For a defect determined as a foreign substance in the previous process, the coordinates of the defect determined by the fatality determination unit 43 are examined, and a defect classified as a shape defect or discoloration in the next process is determined to be fatal.

While several embodiments of the visual inspection apparatus used in the semiconductor manufacturing system of the present invention have been described above, defect judgment and defect classification are performed by detecting and aligning an image of a target wafer. ing. Therefore, in a place where the circuit pattern density is low on the wafer, a pattern may enter one corner of the two images to be aligned and may not enter the other, and the image may not be accurately aligned. Therefore, a dummy pattern is created for an area without a pattern so that the pattern can be aligned so that the pattern is always included in the detected image. The dummy pattern may have any shape. In this way,
Inspection and defect classification of wafers can greatly contribute to yield management of processes and equipment.

Although the above embodiment has been described with reference to a wafer, the present invention is also applicable to semiconductor products such as TFTs and thin-film magnetic heads.

[0041]

As described above, according to the present invention, the defects detected by the visual inspection device can be automatically classified and the fatality of the detected foreign matter can be determined, which greatly contributes to the yield management of the process and the equipment. It is possible to stably maintain LSI production at a high yield.

[0042]

[Brief description of the drawings]

FIG. 1 is an overall configuration diagram showing an embodiment of a defect detection device for a pattern to-be-inspected used in a semiconductor manufacturing system according to the present invention.

FIG. 2 is a diagram showing a state in which a circuit pattern at a position inside a chip on an adjacent wafer is compared in the apparatus shown in FIG. 1;

FIG. 3 is a diagram showing a detected image, a stored image, an alignment image, a difference image, and a binary image obtained by the apparatus shown in FIG.

FIG. 4 is a diagram showing an image of a defective portion and an image of a non-defective part at Z = Z ₁ in the apparatus shown in FIG. 1, a difference image aligned with these images, and a grayscale waveform of the difference image.

FIG. 5 is a diagram showing a flow of determining the type of a defect by the defect classification circuit shown in FIG. 1;

FIG. 6 is a diagram showing image differentiation performed by the differentiating circuit shown in FIG. 1;

FIG. 7 is a diagram showing a specific configuration of the secondary differentiating circuit shown in FIG. 1;

FIG. 8 is a diagram showing an embodiment of multi-focus image detection different from FIG.

9 is a diagram showing an overall configuration of a defect detection apparatus for a pattern to-be-inspected used in a semiconductor manufacturing system according to the present invention to which the multi-focus image detection shown in FIG. 8 is applied.

FIG. 10 is a diagram showing an embodiment different from FIG. 1, in which a color change defect is determined by optical means.

FIG. 11 is a diagram showing an entire configuration to which the embodiment shown in FIG. 10 is applied.

FIG. 12 is a diagram showing the relationship between bright-field illumination and dark-field illumination and the gray level of a difference image for various defects.

FIG. 13 is a schematic configuration diagram showing another embodiment different from the dark-field image detection shown in FIG. 10;

FIG. 14 is a diagram showing a semiconductor manufacturing system according to the present invention.

FIG. 15 is a diagram showing a focus position relationship with respect to a pattern to be inspected.

FIG. 16 is a diagram showing the relationship between the Z position of the focal plane and the gray value of the difference image for various defects.

FIG. 17 is a view showing the relationship between the order of differentiation and the gray value of a difference image in various defects.

FIG. 18 is a flowchart showing one embodiment of the processing in the apparatus shown in FIG. 1;

FIG. 19 is a flowchart showing an example of processing different from that in FIG. 18;

FIG. 20 is a diagram showing a specific configuration of an apparatus that performs a foreign matter fatality determination using an appearance inspection apparatus.

FIG. 21 is a schematic configuration diagram showing an embodiment in which defect detection and defect classification are performed by different optical systems.

FIG. 22 is a view showing various types of defects existing in a pattern to be inspected.

FIG. 23 is a diagram showing an example of a conventional defect detection apparatus for a pattern to-be-inspected.

FIG. 24 is a diagram showing another example of a conventional defect detection device for a pattern to-be-inspected.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Wafer, 13 ... TV camera, 15 ... Image memory, 16, 21, 24 ... Positioning circuit, 17, 22, 26 ... Difference image detection circuit, 23, 27 ... Maximum value detection circuit, 25 ... Differentiating circuit, 30 ... Defect classification circuit.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G01B 11/00-11/30 G01N 21/88 H01L 21/66 G06F 15/62 405 G06F 15/64

Claims (7)

(57) [Claims] In a semiconductor device manufacturing system for manufacturing a semiconductor device by processing a substrate to be processed in a plurality of steps, before and after a predetermined step of the plurality of steps of processing the substrate to be processed. Detecting means for detecting a defect on the substrate to be processed, and determining means for comparing the state of occurrence of the defect based on an output signal from the detecting means to specify the step of generating the defect, Semiconductor device manufacturing system. Wherein said detecting means is a manufacturing system for a semiconductor device according to claim 1, wherein the said defect is detected based on the multi-focus image signal of the inspected substrate surface. Wherein said detecting means, manufacturing system of claim 1 a semiconductor device according to the defect, and detects on the basis the bright field image signal of the inspection surface of the substrate and the dark-field image signal . Wherein said defect is foreign matter defects, manufacturing system for a semiconductor device according to any one of claims 1 to 3, characterized in that at least one of discoloration defects or shape defect. 5. Oite the manufacture of a semiconductor device for manufacturing a semiconductor device by processing a substrate to be processed in multiple steps,
Before and after a predetermined step of the plurality of steps of processing the substrate to be processed, inspect at least one of foreign matter defects, discoloration defects or shape defects on the substrate to be processed,
A defect inspection method for a semiconductor device, wherein a process of generating the foreign matter defect, discoloration defect or shape defect is specified by comparing the state of occurrence of the foreign matter defect, discoloration defect or shape defect. 6. The method according to claim 1, wherein the foreign matter defect, discoloration defect or shape defect is
6. The defect inspection method for a semiconductor device according to claim 5 , wherein the detection is performed based on a multifocal image signal of the surface of the substrate to be inspected. 7. The method according to claim 1, wherein said foreign matter defect, discoloration defect or shape defect is
6. The method according to claim 5 , wherein the detection is performed based on a bright-field image signal and a dark-field image signal of the surface of the substrate to be inspected.