JPH0322435A - Semiconductor device - Google Patents

Abstract

PURPOSE:To use tungsten silicide having low resistance in a thin-film as an upper electrode material, and to increase the working speed of a semiconductor device by forming a multilayer film having a polycrystalline silicon film in a lower layer with the exception of a contact section in a second wiring layer shaped onto a first wiring layer through a capacity insulating film. CONSTITUTION:A polycide film 104 is used as a first wiring layer formed onto a field oxide film 103, and constitutes one electrode of stacked capacitor. A silicon oxide film 106 and a silicon nitride film 107 are employed insulating films for the stacked capacitor. A polycrystalline silicon film 108 is shaped between the silicide layer 110 of a high melting-point metal such as W, Mo, etc., organizing the other electrode and the thin stack-capacity insulating films 106, 107 in the lower layer of the silicide layer 110, but the silicide layer 110 is connected directly to an N-type diffusion layer 102 without through the polycrystalline silicon film 108 in a contact hole 109 section. According to the constitution, the material for the upper electrode of the stacked capacitor is thinned and the resistance of the electrode material is lowered, contact resistance can be reduced, and the working speed of a semiconductor device having stack capacity as a semiconductor memory is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a stack capacitor with a polycide film as one electrode.

[Conventional technology]

Conventionally, as shown in FIG. 4, a stacked capacitor film (a silicon oxide film 6 and a silicon nitride film) is formed between wiring layers of a semiconductor device, particularly on a polycide film 4 that is formed in the same process as a polycide gate electrode of a MOS transistor. When forming the two-layer film 7) and forming the upper electrode material, a single-layer polycrystalline silicon film 8 was used as the upper electrode material.

[Problem to be solved by the invention]

The stack capacitance of the conventional semiconductor device described above has problems such as the breakdown voltage of the thin stack capacitor film being lowered when a silicide film is used as the upper electrode material. Couldn't use it.

Since the upper electrode material cannot be made of tungsten silicide, which is a thinner film and has lower resistance, this is an obstacle to increasing the speed of semiconductor devices.

[Means to solve the problem]

The present invention provides a semiconductor device in which a second wiring layer provided on a first wiring layer via a capacitive insulating film is in contact with an impurity diffusion layer of a semiconductor substrate, wherein the second wiring layer is in contact with an impurity diffusion layer of a semiconductor substrate. Except for the department? It is a multilayer film having a polycrystalline silicon film as the lower layer.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of a semiconductor chip showing a first embodiment of the present invention.

The polyzide film 104 is a first wiring layer provided on the field oxide film 103 and constitutes one electrode of the stack capacitor. Silicon oxide film 106 and silicon nitride film 1
05 is a stacked capacitor insulating film. There is a polycrystalline silicon film 106 between the thin stacked capacitor insulating film and the silicide layer 108 made of a high melting point metal such as W or Mo.
In the contact hole 109, the silicide layer 108 is directly connected to the N-type diffusion layer 102 without using the polycrystalline silicon film. The thickness of the thin silicon oxide film 106 is 12O
A-The thickness of the silicon nitride film 107 is 200 mm on the oxide film.
Although it is A, it can be controlled by the manufacturing method shown below. FIGS. 2(a) to 2(f) are cross-sectional views of semiconductor chips arranged in the order of steps for explaining the manufacturing method of the first embodiment. First, as shown in FIG. 2(a), 600 OA of field oxide wA 103 is formed on a P-type semiconductor substrate 101 (silicon) for element isolation as an active region.
An N-type diffusion layer 2 is formed by ion implantation. Polycrystalline silicon diffused with phosphorus and a tungsten silicide layer deposited thereon form the polycide film 4 as the first wiring layer and the gate of the transistor. Next, as shown in FIG. 2(b), in order to form a stack capacitance on the polycide film, a silicon oxide film 107 with a thickness of about 12 OA is formed on the entire polycide film, and then by a vapor phase method. A silicon nitride film 107 with a thickness of 20 OA is grown.

Next, as shown in FIG. 2(c), the polycrystalline silicon film 1
08 was grown to a thickness of 500A using the vapor phase growth method, as shown in Figure 2 (
As shown in d), a contact hole 109 is formed on the N-type diffusion layer by photoresist processing, and the polycrystalline silicon film, silicon nitride film, and silicon oxide film are selectively removed by dry etching with CF4 gas. . Figure 2 (
As shown in e), when the photoresist used during plasma etching is removed, a thin silicon oxide film 112 is formed on the silicon interface of the contact hole by oxygen plasma treatment, but as shown in Fig. 2(f). By etching the entire surface with buffered hydrofluoric acid, only the silicon oxide film in the contact area is removed, and the part serving as the stack capacitor is protected by the 500A polycrystalline silicon film 108. Silicon oxide films and silicon nitride films do not deteriorate. Next, as shown in FIG. 1, a silicide film 1 of tungsten, etc.
10 can be deposited and patterned to form a stacked capacitor with good yield.

In this example, the other electrode of the stack capacitor was connected to the semiconductor substrate diffusion waste, but the wiring layer below the stack capacitor base electrode, or the wiring layer in the same layer as the stack capacitor base electrode layer but other than the base electrode layer It is clear that it is equally effective when contacting layers.

Since the stack capacitor insulating film is covered with a polycrystalline silicon film, there is no drop in the withstand voltage of the stack capacitor insulating film as in the conventional example, and a tungsten silicide film is layered on the thin polycrystalline silicon film except for the contact area. By forming a two-layer film, the upper electrode material can be made into a thin film with low resistance, and when contacting the upper electrode material with the diffusion layer, only the contact portion is used. By using a single layer of tungsten silicide without a thin polycrystalline silicon film, the tungsten silicide and the diffusion layer can be in direct contact with each other, and a low resistance contact can be realized.

FIG. 3 is a longitudinal sectional view of a semiconductor chip showing a second embodiment of the present invention.

Since a thick insulating film 214 is provided in areas other than directly above the polycide film 204, the capacitance actually exists only between the two-layer film of the polycrystalline silicon film 208 and the silicide film 210 and the polycide film 204. Therefore, parasitic capacitance can be reduced. In this case, the N-type diffusion N202 is covered with thick insulation [214], and if the contact hole is opened by wet etching, the contact hole will expand laterally, so dry etching must be used. However, since the entire silicon oxide film can be etched after dry etching (the stack capacitor insulating film is covered with a polycrystalline silicon film), there is no problem. This is not possible with the conventional structure in which direct contact is made with the upper electrode of a single layer film.

〔Effect of the invention〕

As explained above, the present invention makes the upper electrode material of the stack capacitor a two-layer film of a polycrystalline silicon film and a suitable wiring material such as a refractory metal tungsten silicide film, and only the contact portion with the base diffusion layer is formed. By using a single-layer film without a polycrystalline silicon film, the stack upper electrode material can be made thinner and have lower resistance, and the contact resistance can be reduced, making it possible to increase the speed of semiconductor devices with stack capacitance such as semiconductor memories. There are effects that can be achieved.

FIG. 1 is a cross-sectional view of a semiconductor chip showing a first embodiment of the present invention, and FIGS. 2(a) to (f) are semiconductor chips arranged in the order of steps to explain the manufacturing method of the first embodiment. 3 is a sectional view of a semiconductor chip showing a second embodiment, and FIG. 4 is a sectional view of a semiconductor chip showing a conventional example.

1,101,201...P-type semiconductor substrate, 2,102
, 202... N-type diffusion layer, 3, 103, 203...
Field oxide film, 4.104 204...Polycide film, 5,105,205,6 106.206.
...Silicon oxide film, 7,107,207...Silicon nitride film, 8,108,208...Polycrystalline silicon film, 9,109,209...Contact 1/hole, 110,
210... Silicide film, 1 1 1... Photoresist film, 112... Silicon oxide film, 214...
Insulating film.

Claims (1)

[Claims] In a semiconductor device in which a second wiring layer provided on the first wiring layer via a capacitive insulating film is in contact with an impurity diffusion layer of a semiconductor substrate, the second wiring layer is provided with the second wiring layer except for the contact portion. A semiconductor device characterized in that it is a multilayer film having a polycrystalline silicon film as a lower layer.