JP2695812B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device, and more particularly, to a semiconductor device using a polycrystalline silicon material for wiring of a semiconductor element.

(Prior art) Polycrystalline silicon material is often used for wiring of semiconductor devices such as MOS (insulated gate) devices and bipolar devices, which enables various self-aligned structures, and enables high integration of devices. It greatly contributes to the realization of high density. For example, a conventional MOS as shown in FIG.
In the transistor, a polycrystalline silicon material is used for the gate electrode wiring 43. Here, 40 is a silicon substrate, 41 is a field oxide film, 42 is a silicon oxide film (gate insulating film), 44 is a source diffusion layer region, 45 is a drain diffusion layer region, 46 is an insulating film, and 47 is aluminum silicon wiring. It is.

By the way, since the gate insulating film 42 is thinned due to the miniaturization of the element, the impurities (doped in the polycrystalline silicon material) may be obtained through a thermal process in the process after the deposition of the polycrystalline silicon film for the gate electrode wiring. For example, P, As, B, etc.) are diffused into the gate insulating film 42 and deteriorate the quality of the silicon oxide film, which causes a problem that transistor characteristics and reliability are deteriorated or defects are caused.

(Problems to be Solved by the Invention) The present invention is to solve the problem that impurities in the polycrystalline silicon material for electrode wiring diffuse to the outside as described above, leading to a decrease in the reliability of the semiconductor element. It is an object of the present invention to provide a semiconductor device capable of preventing diffusion of impurities from a polycrystalline silicon material to a lower layer or a periphery thereof.

[Structure of the Invention] (Means for Solving the Problems) A semiconductor device according to the present invention includes a gate electrode pattern made of a polycrystalline silicon material provided on a semiconductor substrate and a periphery of the gate electrode pattern. A diffusion-resistant conductive film provided as a barrier for impurity diffusion from the polycrystalline silicon material to the surrounding insulating film.

(Function) Since the lower portion or the periphery of the polycrystalline silicon material is covered with a film serving as a barrier for impurity diffusion, impurities contained in the polycrystalline silicon material may be removed even after a thermal process of a semiconductor device manufacturing process. It is possible to prevent the characteristics and reliability of the semiconductor element from lowering without being diffused to the lower layer or the periphery.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIGS. 1A to 1D show a process of manufacturing a MOS transistor in a MOS LSI. That is, first, as shown in FIG. 1A, a field oxide film 2 is selectively formed on a semiconductor substrate (for example, a P-type silicon substrate) 1 by using a thermal oxidation method. Next, a silicon oxide film 3 serving as a gate insulating film is formed on the entire surface of the substrate by a thermal oxidation method. Next, for example, a titanium carbide film 4 serving as an impurity diffusion resistant conductive film is deposited and formed to a thickness of 500 mm over the entire surface of the substrate by, for example, a reactive sputtering method. Next, a polycrystalline silicon material for gate electrode wiring is deposited on the entire surface of the substrate. Next, an N-type impurity is doped into the polycrystalline silicon material by a POCl ₃ diffusion method. Next, the polycrystalline silicon material and the titanium carbide film 4 are patterned by using the well-known PEP method (photo etching method) and PIE method (reactive ion etching method), and the gate electrode is formed as shown in FIG. The pattern 5 and the titanium carbide film 4 'are formed in a self-aligned manner. At this time, a wiring pattern (not shown) made of a polycrystalline silicon material connected to the gate electrode pattern 5 and a titanium carbide film pattern (not shown) thereunder are also formed at the same time. Next, as shown in FIG. 1C, a source diffusion layer region 6 and a drain diffusion layer region 7 are formed by ion implantation using the gate electrode pattern 5 as a mask and subsequent annealing.
Next, as shown in FIG. 1 (d), a PSG layer (phosphorus silicate glass layer) 8 is formed on the entire surface of the substrate, and a contact hole is formed in the PSG layer 8 by a well-known method. Metal wiring film (for example, aluminum
A silicon wiring is formed, and the patterning is performed to form a metal wiring 9.

According to the MOS transistor of FIG. 1D formed as described above, since the titanium carbide film 4 ′ serving as the impurity diffusion resistant film is provided on the entire lower surface of the polycrystalline silicon material 5, Impurities (phosphorus in this example) from the polycrystalline silicon material are prevented from diffusing from the polycrystalline silicon material into the gate insulating film 3 by a thermal process after the deposition of the silicon material, and are completely protected from deterioration in characteristics and reliability of the MOS transistor. .

In the above embodiment, the titanium carbide film is used as the diffusion-resistant conductive film. However, the present invention is not limited to this, and titanium nitride may be used. Further, in the above embodiment, the diffusion-resistant conductive film is provided only under the polycrystalline silicon material for the electrode wiring, but the diffusion-resistant conductive film is provided so as to completely cover the periphery of the polycrystalline silicon material. Thus, impurity diffusion from the polycrystalline silicon material to the surrounding insulating film may be prevented, and an example thereof is shown in FIG. That is,
The MOS transistor shown in FIG. 2 is different from the MOS transistor described above with reference to FIG. 1D in that the periphery of the gate electrode pattern 5 is covered with a titanium carbide film 20, and the others are the same. 1 (d) are denoted by the same reference numerals and description thereof will be omitted. In each of the embodiments described above, the MOS type LSI having one layer of polysilicon gate electrode is shown. An example is shown in FIG. That is, FIG. 3 shows a floating gate type transistor, which is different from the MOS transistor described above with reference to FIG.
Floating gate electrode pattern 31 made of polycrystalline silicon material
And a control gate electrode pattern (and a control gate wiring (not shown)) 32 are formed in two layers, and a titanium carbide film 33 is formed below the floating gate electrode pattern 31. Patterns 31, 32
A gate insulating film (silicon oxide film) 34 is formed between the layers, and a titanium carbide film 35 is formed below the control gate electrode pattern 32 (above the gate oxide film 34). Fig. 1 (d)
The same parts as those in FIG.

Further, in each of the above embodiments, the titanium carbide film and the titanium nitride film are illustrated as the conductive films serving as barriers for impurity diffusion. Carbides can be used.

In each of the embodiments described above, the MOS type LSI is described. However, the present invention can be generally applied to other semiconductor elements such as a bipolar element and a capacitance element.

[Effects of the Invention] As described above, according to the semiconductor device of the present invention, a highly integrated polycrystalline silicon material is used for wiring such as electrodes of a semiconductor element and wiring between semiconductor elements, and a polycrystalline silicon material is provided below or around the same. By providing a diffusion-resistant conductive film that serves as a barrier for impurity diffusion, it is possible to prevent impurities contained in the polycrystalline silicon material from being diffused to the outside and to deteriorate the characteristics and reliability of the semiconductor device. Integration and high reliability can be achieved.

[Brief description of the drawings]

1 (a) to 1 (d) are cross-sectional views showing manufacturing steps of one embodiment of the semiconductor device of the present invention, and FIGS. 2 and 3 show semiconductor devices according to other embodiments of the present invention, respectively. FIG. 4 is a sectional view showing a conventional MOS transistor. 3,34 ... gate insulating film, 4,20 ... titanium carbide film,
5 ... Gate electrode, 8 ... PSG film, 31 ... Floating gate electrode, 32 ... Control gate electrode, 33,35 ... Titanium carbide film.

Claims (1)

(57) [Claims] 1. A gate electrode pattern made of a polycrystalline silicon material provided on a semiconductor substrate, and a gate electrode pattern provided from the polycrystalline silicon material to cover the periphery of the gate electrode pattern. 1. A semiconductor device comprising: a diffusion-resistant conductive film serving as a barrier for impurity diffusion.