JPH03203337A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH03203337A
JPH03203337A JP1342887A JP34288789A JPH03203337A JP H03203337 A JPH03203337 A JP H03203337A JP 1342887 A JP1342887 A JP 1342887A JP 34288789 A JP34288789 A JP 34288789A JP H03203337 A JPH03203337 A JP H03203337A
Authority
JP
Japan
Prior art keywords
bonding
projected parts
positions
base
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1342887A
Other languages
English (en)
Inventor
Isamu Okamoto
勇 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1342887A priority Critical patent/JPH03203337A/ja
Publication of JPH03203337A publication Critical patent/JPH03203337A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05557—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、集積回路、トランジスタ等に代表される半導
体装置の製造に関し、特に半導体素子のボンディングす
る箇所に、金属細線の安定したボンディングが可能とな
る半導体装置の製造に関するものである。
〔従来の技術〕
従来、半導体素子への金属細線のボンディングは第３図
（ａ）の平面図およびそのＡ−Ａ断面を示す同図（ｂ）
の断面図に示すように、半導体素子（本例はトランジス
タ素子）のベース層Ｂ、エミッタ層Ｅに形成されている
ベース電極３およびエミッタ電極４を、ボンディング装
置に設置されているパターン認識装置が検知し、この検
知した電極上に金属細線５をボンディングしておった。
〔発明が解決しようとする課題〕
上述した半導体素子への金属細線のボンディング方法は
、生産数の増加に伴ないボンディング作業のインデック
スもアップされており、パターン認識装置における認識
不足又は誤認識が生じ、他電極と接触し短絡といった不
具合を生じることが時たま発生するという欠点を有する
。
〔課題を解決するための手段〕
上記課題に対し本発明の半導体素子への金属細線ボンデ
ィングは、半導体素子の電極部に予めエツチング等によ
りボンディング領域として凸部を設けて、ペレットパタ
ーン認識装置が自動的に前記凸部を認識して一定のボン
ディング領域が決まり、この凸部に安定したボンディン
グを可能としている。
〔実施例〕
つぎに本発明を実施例により説明する。
第１図（ａ）は本発明の一実施例を説明するための平面
図、同図（ｂ）は同図（ａ）のＡ−Ａ断面図である。第
１図（ａ）、　（ｂ）において、半導体素子、例えばト
ランジスタ素子１には、コレクタ層Ｃをベースにし、ベ
ース層Ｂおよびエミツタ層Ｅが形成され、このベース層
Ｂおよびエミツタ層Ｅの酸化膜２で被われた表面に窓を
あけ、金属の蒸着によりベース電極３およびエミッタ電
極４が形成されている。しかして、これらの電極にはさ
らにエツチングにより円形の凸部３ａおよび４ａが形成
され、この凸部をボンディング装置のパターン認識装置
が検知し凸部３ａおよび４ａに正確に金属細線５をボン
ディングする。
第２図は本発明の第２実施例の平面図であり、半導体素
子１１のプロセスは第１図と同じ作業にて作られ、半導
体素子１１の表面はエツチング等でボンディング領域と
して四角状の凸部３ｂおよび４ｂを有し、ボンディング
方法は第１図と同じ内容にて実施され、ボンディング領
域の形状のみが異なっている。該半導体素子１１におい
てもボンディング領域が固定されているため一定した品
質のボンディングが可能となる。
なお上記実施例はトランジスタ素子について説明してい
るが、本発明はトランジスタ素子に限らず、ダイオード
砂集積回路などについても同様に適用されるのはいうま
でもない。
〔発明の効果〕
以上説明したように本発明は、半導体素子に金属細線を
ボンディングする際、半導体素子の表面に予めエツチン
グ等によりボンディング領域として凸部を形成すること
により決められた位置にボンディングがされ、ボンディ
ング位置不良等による不具合がなく安定した半導体装置
の供給が可能となる。
【図面の簡単な説明】
第１図（ａ）は本発明の第１の実施例を説明するための
平面図、同図（ｂ）は同図（ａ）のＡ−Ａ断面図、第２
図は本発明の第２の実施例を説明するための平面図、第
３図（ａ）は従来の半導体装置の金属細線ボンディング
法を説明するための平面図、同図（ｂ）は同図（ａ）の
Ａ−Ａ断面図である。 １．１１・・・・・・トランジスタ素子、２・・・・・
・酸化膜、３・・・・・・ベースｉｌ［＋、３　ａ、　
３　ｂ・・・・・・ベース電極の凸部、４・・・・・・
エミッタ電極、４　ａ、　４　ｂ・・・・・・エミッタ
電極の凸部、５・・・・・・金属細線。

Claims (1)

    【特許請求の範囲】
  1. 半導体素子の電極と外部リード端子との間を金属細線で
    ボンディング接続することを含む半導体装置の製造方法
    において、前記電極のボンディング箇所に凸部を形成し
    ておき、この凸部をパターン認識装置により検知し該凸
    部に前記金属細線をボンディングすることを特徴とする
    半導体装置の製造方法。
JP1342887A 1989-12-29 1989-12-29 半導体装置の製造方法 Pending JPH03203337A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1342887A JPH03203337A (ja) 1989-12-29 1989-12-29 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1342887A JPH03203337A (ja) 1989-12-29 1989-12-29 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPH03203337A true JPH03203337A (ja) 1991-09-05

Family

ID=18357282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1342887A Pending JPH03203337A (ja) 1989-12-29 1989-12-29 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH03203337A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2816520A1 (fr) * 2000-11-15 2002-05-17 Joint Industrial Processors For Electronics Dispositif d'injection multi-zones dans un reacteur rtp ou cvd a chauffage par lampes a rayonnement electromagnetique

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2816520A1 (fr) * 2000-11-15 2002-05-17 Joint Industrial Processors For Electronics Dispositif d'injection multi-zones dans un reacteur rtp ou cvd a chauffage par lampes a rayonnement electromagnetique
WO2002040740A1 (fr) * 2000-11-15 2002-05-23 Joint Industrial Processors For Electronics Dispositif d'injection multi-zones de gaz dans un reacteur

Similar Documents

Publication Publication Date Title
EP0229426B1 (en) Method of manufacturing a semiconductor device, in which a metallization with a thick connection electrode is provided on a semiconductor body
EP0464226B1 (en) Magnetoresistive sensor
JPH03203337A (ja) 半導体装置の製造方法
JPH0397251A (ja) 半導体装置及びその製造方法
JP2789395B2 (ja) ワイヤボンデイング方法
JPS5852327B2 (ja) ハンドウタイソシノ セイゾウホウホウ
JPS6334268Y2 (ja)
US20040048464A1 (en) Semiconductor device having a planarized structure and the method for producing the same
JPS6223112A (ja) 半導体装置
JPH07240431A (ja) 回路基板の位置合わせマークとその製造方法
KR940008885B1 (ko) 자기 저항 소자 및 그의 제조방법
JPH03132048A (ja) 半導体装置
JP2700004B2 (ja) 半導体装置の製造方法
KR100242634B1 (ko) 반도체 장치의 패드 구조 및 그 제조방법
JPS6344997Y2 (ja)
JPS6225906Y2 (ja)
JPH0193133A (ja) 半導体装置の製造方法
JPH05206216A (ja) テープキャリア、半導体装置実装体及び実装方法
JPH03209735A (ja) バンプ付きｔａｂテープの製造方法
JPS5939899B2 (ja) 半導体装置の製造方法
JPH0778824A (ja) 電極の製造方法
JPS6113635A (ja) 集積回路の製造方法
JPH02224362A (ja) 半導体装置の製造方法
JPH0766237A (ja) 半導体パッケージ構造体
JPH02275651A (ja) バンプ転写方法