JPH03121728U - - Google Patents
Info
- Publication number
- JPH03121728U JPH03121728U JP3121790U JP3121790U JPH03121728U JP H03121728 U JPH03121728 U JP H03121728U JP 3121790 U JP3121790 U JP 3121790U JP 3121790 U JP3121790 U JP 3121790U JP H03121728 U JPH03121728 U JP H03121728U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- delay amount
- input terminal
- delay
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims 3
- 238000001514 detection method Methods 0.000 claims 2
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3121790U JPH03121728U (US20050065096A1-20050324-C00034.png) | 1990-03-27 | 1990-03-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3121790U JPH03121728U (US20050065096A1-20050324-C00034.png) | 1990-03-27 | 1990-03-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03121728U true JPH03121728U (US20050065096A1-20050324-C00034.png) | 1991-12-12 |
Family
ID=31533959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3121790U Pending JPH03121728U (US20050065096A1-20050324-C00034.png) | 1990-03-27 | 1990-03-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03121728U (US20050065096A1-20050324-C00034.png) |
-
1990
- 1990-03-27 JP JP3121790U patent/JPH03121728U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH03121728U (US20050065096A1-20050324-C00034.png) | ||
| JP2969732B2 (ja) | 半導体集積回路 | |
| JP2557866Y2 (ja) | 信号切換回路 | |
| JPS5936034Y2 (ja) | Ｔ型フリップフロップ回路 | |
| JPH0262797A (ja) | ダイナミック形シフトレジスタ | |
| JPH08298443A (ja) | Ｄ型フリップフロップ | |
| JPH0273713A (ja) | 半導体集積回路のクロックラインバッフア回路 | |
| JPS594336Y2 (ja) | デジタル積分回路 | |
| JPS63140732U (US20050065096A1-20050324-C00034.png) | ||
| JP2690615B2 (ja) | 論理回路 | |
| JPH04105412A (ja) | フリップフロップ | |
| JPH02148474U (US20050065096A1-20050324-C00034.png) | ||
| JPH01212018A (ja) | パルスノイズ除去回路 | |
| JPS6181221U (US20050065096A1-20050324-C00034.png) | ||
| JPH0290725A (ja) | 出力回路 | |
| JPH0475430U (US20050065096A1-20050324-C00034.png) | ||
| JPH02135815A (ja) | 高低いずれかのレベルにおいて互いに重なりのない２相の論理信号を生じる回路 | |
| JPH088476B2 (ja) | 半導体集積回路のタイマ回路 | |
| JPS63163541U (US20050065096A1-20050324-C00034.png) | ||
| JPH03116441U (US20050065096A1-20050324-C00034.png) | ||
| JPS6289880U (US20050065096A1-20050324-C00034.png) | ||
| JPH0439740U (US20050065096A1-20050324-C00034.png) | ||
| JPS6258000U (US20050065096A1-20050324-C00034.png) | ||
| JPH02170616A (ja) | 論理集積回路 | |
| JPS60192538U (ja) | 論理回路 |
