JPH03104748U - - Google Patents

Info

Publication number
JPH03104748U
JPH03104748U JP1990014163U JP1416390U JPH03104748U JP H03104748 U JPH03104748 U JP H03104748U JP 1990014163 U JP1990014163 U JP 1990014163U JP 1416390 U JP1416390 U JP 1416390U JP H03104748 U JPH03104748 U JP H03104748U
Authority
JP
Japan
Prior art keywords
chips
package
composite
secures
cladding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990014163U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990014163U priority Critical patent/JPH03104748U/ja
Publication of JPH03104748U publication Critical patent/JPH03104748U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの考案の一実施例である複合ＩＣパ
ツケージの断面図、第２図は従来の複合ＩＣパツ
ケージの説明用平面図、第３図は第２図のＡ−Ａ
′−線における断面図である。 図において、１……制御用ＩＣチツプ、２……
パワー用ＩＣチツプ、３……ボンデイングパツド
、４１……ボンデイングパツド、５０……金属ブ
ロツク。なお、図中、同一符号は同一、又は相当
部分を示す。 Figure 1 is a sectional view of a composite IC package that is an embodiment of this invention, Figure 2 is an explanatory plan view of a conventional composite IC package, and Figure 3 is taken from A-A in Figure 2.
FIG. In the figure, 1... control IC chip, 2...
Power IC chip, 3... bonding pad, 41... bonding pad, 50... metal block. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の半導体チツプを搭載する樹脂封止形のパ
ツケージにおいて、複数チツプの内、比較的消費
電力が大きい、あるいはチツプサイズの大きい少
なくとも１つの半導体チツプを固着するボンデイ
ング部において、シリコンと熱膨張係数の近いモ
リブデンあるいはタングステンなどの金属ブロツ
クをあらかじめ、圧入あるいはクラツド法等によ
り、一体成形したフレーム材により構成されたこ
とを特徴とする複合ＩＣパツケージ。 In a resin-sealed package that mounts multiple semiconductor chips, the bonding part that secures at least one semiconductor chip with relatively high power consumption or large chip size among the multiple chips has a thermal expansion coefficient similar to that of silicon. A composite IC package characterized in that it is constructed from a frame material in which metal blocks such as molybdenum or tungsten are integrally molded in advance by press-fitting or cladding.
JP1990014163U 1990-02-15 1990-02-15 Pending JPH03104748U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990014163U JPH03104748U (en) 1990-02-15 1990-02-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990014163U JPH03104748U (en) 1990-02-15 1990-02-15

Publications (1)

Publication Number Publication Date
JPH03104748U true JPH03104748U (en) 1991-10-30

Family

ID=31517540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990014163U Pending JPH03104748U (en) 1990-02-15 1990-02-15

Country Status (1)

Country Link
JP (1) JPH03104748U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004273570A (en) * 2003-03-05 2004-09-30 Sanyo Electric Co Ltd Resin sealed semiconductor device and its manufacturing method
JP2018018952A (en) * 2016-07-28 2018-02-01 三菱電機株式会社 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004273570A (en) * 2003-03-05 2004-09-30 Sanyo Electric Co Ltd Resin sealed semiconductor device and its manufacturing method
JP2018018952A (en) * 2016-07-28 2018-02-01 三菱電機株式会社 Semiconductor device

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