JPH03101542U - - Google Patents

Info

Publication number
JPH03101542U
JPH03101542U JP1990009191U JP919190U JPH03101542U JP H03101542 U JPH03101542 U JP H03101542U JP 1990009191 U JP1990009191 U JP 1990009191U JP 919190 U JP919190 U JP 919190U JP H03101542 U JPH03101542 U JP H03101542U
Authority
JP
Japan
Prior art keywords
semiconductor device
encapsulated
resin material
thermal conductivity
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990009191U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990009191U priority Critical patent/JPH03101542U/ja
Publication of JPH03101542U publication Critical patent/JPH03101542U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例による半導体装置
の断面図、第2図は従来の半導体装置の断面図で
ある。 図において、1……半導体素子、2……封止樹
脂材、3……ダイパツド、4……ワイヤ、5……
リードフレーム、6……放熱板を示す。なお、図
中、同一符号は同一、または相当部分を示す。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of this invention, and FIG. 2 is a sectional view of a conventional semiconductor device. In the figure, 1... semiconductor element, 2... sealing resin material, 3... die pad, 4... wire, 5...
Lead frame, 6... indicates a heat sink. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子を樹脂封止した半導体装置において
、半導体装置の封止樹脂材の上下面に高熱伝導の
金属板を装着したことを特徴とする半導体装置。
What is claimed is: 1. A semiconductor device in which a semiconductor element is encapsulated in resin, characterized in that metal plates with high thermal conductivity are attached to the upper and lower surfaces of the encapsulating resin material of the semiconductor device.
JP1990009191U 1990-02-01 1990-02-01 Pending JPH03101542U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990009191U JPH03101542U (en) 1990-02-01 1990-02-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990009191U JPH03101542U (en) 1990-02-01 1990-02-01

Publications (1)

Publication Number Publication Date
JPH03101542U true JPH03101542U (en) 1991-10-23

Family

ID=31512795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990009191U Pending JPH03101542U (en) 1990-02-01 1990-02-01

Country Status (1)

Country Link
JP (1) JPH03101542U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997031394A1 (en) * 1996-02-22 1997-08-28 Nitto Denko Corporation Semiconductor device and method for manufacturing the same
JP2011023463A (en) * 2009-07-14 2011-02-03 Denso Corp Semiconductor module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997031394A1 (en) * 1996-02-22 1997-08-28 Nitto Denko Corporation Semiconductor device and method for manufacturing the same
JP2011023463A (en) * 2009-07-14 2011-02-03 Denso Corp Semiconductor module
US9449893B2 (en) 2009-07-14 2016-09-20 Denso Corporation Semiconductor module

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