JPH0268469U - - Google Patents
Info
- Publication number
- JPH0268469U JPH0268469U JP14815288U JP14815288U JPH0268469U JP H0268469 U JPH0268469 U JP H0268469U JP 14815288 U JP14815288 U JP 14815288U JP 14815288 U JP14815288 U JP 14815288U JP H0268469 U JPH0268469 U JP H0268469U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- substrate
- conductive sheet
- circuit according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims 5
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 239000007769 metal material Substances 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
- Casings For Electric Apparatus (AREA)
Description
第１図は本考案の混成集積回路を示す断面図、
第２図は本実施例で用いる導電性シートを示す斜
視図、第３図は従来例を示す断面図である。
１…絶縁金属基板、２…デジタル系回路領域、
３…アナログ系回路領域、４…導電性シート、５
…封止容器。
FIG. 1 is a cross-sectional view showing the hybrid integrated circuit of the present invention;
FIG. 2 is a perspective view showing a conductive sheet used in this embodiment, and FIG. 3 is a sectional view showing a conventional example. 1...Insulated metal substrate, 2...Digital circuit area,
3... Analog circuit area, 4... Conductive sheet, 5
...Sealed container.
Claims (1)
金属基板上に形成された混成集積回路において、 前記デジタル系回路が形成される領域と前記ア
ナログ系回路が形成される領域とを導電性シート
によつて区画されてなることを特徴とする混成集
積回路。 (2) 前記導電性シートの両面からは多数の線状
導体が突出され、前記突出された線状導体の片面
は導通状態であることを特徴とする請求項１記載
の混成集積回路。 (3) 前記導電性シートは前記基板に固着一体化
される封止容器と前記基板とで挾持されているこ
とを特徴とする請求項１記載の混成集積回路。 (4) 前記導電性シートが載置される前記基板領
域上には導体が形成され、前記導体の近傍に前記
基板の金属部分を露出させるザグリ部が形成され
、前記導体と前記ザグリ部とが電気的に接続され
ていることを特徴とする請求項１記載の混成集積
回路。 (5) 前記絶縁金属基板は絶縁処理されたアルミ
ニウム基板であることを特徴とする請求項１記載
の混成集積回路。 (6) 前記封止容器は金属材料からなることを特
徴とする請求項３記載の混成集積回路。[Claims for Utility Model Registration] (1) In a hybrid integrated circuit in which a digital circuit and an analog circuit are formed on an insulated metal substrate, an area where the digital circuit is formed and an area where the analog circuit is formed are What is claimed is: 1. A hybrid integrated circuit comprising a conductive sheet and a conductive sheet. (2) The hybrid integrated circuit according to claim 1, wherein a large number of linear conductors are protruded from both sides of the conductive sheet, and one side of the protruded linear conductors is in a conductive state. (3) The hybrid integrated circuit according to claim 1, wherein the conductive sheet is held between the substrate and a sealing container that is fixedly integrated with the substrate. (4) A conductor is formed on the substrate region on which the conductive sheet is placed, a counterbore portion exposing a metal portion of the substrate is formed near the conductor, and the conductor and the counterbore portion are formed. The hybrid integrated circuit according to claim 1, wherein the hybrid integrated circuit is electrically connected. (5) The hybrid integrated circuit according to claim 1, wherein the insulated metal substrate is an aluminum substrate treated with insulation. (6) The hybrid integrated circuit according to claim 3, wherein the sealed container is made of a metal material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148152U JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148152U JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0268469U true JPH0268469U (en) | 1990-05-24 |
| JPH0638438Y2 JPH0638438Y2 (en) | 1994-10-05 |
Family
ID=31419210
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988148152U Expired - Lifetime JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0638438Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013222829A (en) * | 2012-04-17 | 2013-10-28 | Taiyo Yuden Co Ltd | Circuit module and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS497453U (en) * | 1972-04-24 | 1974-01-22 | ||
| JPS5958709A (en) * | 1983-08-22 | 1984-04-04 | 東レ株式会社 | Anisotropic conductive sheet |
-
1988
- 1988-11-14 JP JP1988148152U patent/JPH0638438Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS497453U (en) * | 1972-04-24 | 1974-01-22 | ||
| JPS5958709A (en) * | 1983-08-22 | 1984-04-04 | 東レ株式会社 | Anisotropic conductive sheet |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013222829A (en) * | 2012-04-17 | 2013-10-28 | Taiyo Yuden Co Ltd | Circuit module and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0638438Y2 (en) | 1994-10-05 |