JPH0638438Y2 - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPH0638438Y2 JPH0638438Y2 JP1988148152U JP14815288U JPH0638438Y2 JP H0638438 Y2 JPH0638438 Y2 JP H0638438Y2 JP 1988148152 U JP1988148152 U JP 1988148152U JP 14815288 U JP14815288 U JP 14815288U JP H0638438 Y2 JPH0638438 Y2 JP H0638438Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- metal substrate
- metal
- substrate
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Structure Of Printed Boards (AREA)
- Casings For Electric Apparatus (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
【考案の詳細な説明】 （イ）産業上の利用分野 本考案は混成集積回路に関し、特に同一基板上にデジタ
ル系及びアナログ系回路が形成された混成集積回路の改
良に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit, and more particularly to improvement of a hybrid integrated circuit in which digital and analog circuits are formed on the same substrate.
（ロ）従来の技術 従来、混成集積回路はセラミックス基板上あるいは絶縁
処理された金属基板上に所望形状の導電路を形成し、そ
の導電路上に複数の半導体素子が固着されて所望の回路
機能を有する混成集積回路が提供されている。(B) Conventional technology Conventionally, in a hybrid integrated circuit, a conductive path having a desired shape is formed on a ceramic substrate or an insulated metal substrate, and a plurality of semiconductor elements are fixed on the conductive path to achieve a desired circuit function. A hybrid integrated circuit having is provided.
斯る混成集積回路にデジタル系回路とアナログ系回路と
を形成する場合には同一基板上に両者の回路は形成せず
に、第３図に示す如く、一方の基板（21）上にデジタル
系回路（22）（あるいはアナログ系回路）を形成し、他
方の基板（22）上にアナログ系回路（23）（あるいはデ
ジタル系回路）が形成され、夫々の回路（22）（23）領
域を遮蔽するための金属で形成された遮蔽板（24）を有
するケース材（23）で夫々の基板（21）（22）を一体化
してアナログ系回路（23）からデジタル系回路（22）へ
の干渉の防止を行っていた。When a digital circuit and an analog circuit are formed on such a hybrid integrated circuit, both circuits are not formed on the same substrate, and as shown in FIG. 3, the digital system is formed on one substrate (21). The circuit (22) (or analog system circuit) is formed, and the analog circuit (23) (or digital system circuit) is formed on the other substrate (22) to shield each circuit (22) (23) area. Interference from the analog circuit (23) to the digital circuit (22) by integrating the respective substrates (21) and (22) with a case material (23) having a shielding plate (24) formed of a metal for Was being prevented.
（ハ）考案が解決しようとする課題 上述した如く、混成集積回路にアナログ系回路とデジタ
ル系回路とを形成する場合には第３図で示した如く、夫
々の回路を形成するための二枚の基板が必要となりコス
トが高くなる問題があった。(C) Problems to be Solved by the Invention As described above, when an analog circuit and a digital circuit are formed in a hybrid integrated circuit, as shown in FIG. 3, two sheets for forming each circuit are provided. However, there is a problem that the cost becomes high because of the need for the substrate.
（ニ）課題を解決するための手段 本考案は上述した課題に鑑みて為されたものであり、同
一絶縁金属基板上にデジタル系及びアナログ系回路を形
成し、デジタル系回路が形成された領域とアナログ系回
路が形成された領域とを導電性シートによって区画して
金属製の封止容器で一体化させて解決する。(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and is an area in which digital circuits and analog circuits are formed on the same insulating metal substrate, and the digital circuits are formed. This is solved by partitioning the area where the analog circuit is formed with a conductive sheet and integrating them with a metal sealing container.
（ホ）作用 この様に本考案に依れば、同一絶縁金属基板上にデジタ
ル系回路が形成される領域とアナログ系回路が形成され
た領域とを導電性シートによって区画して、絶縁金属基
板と導電性シートと封止容器とを同電位にすることによ
り、アナログ系回路とデジタル系回路の夫々の回路をシ
ールドすることができる。(E) Function In this way, according to the present invention, the conductive metal sheet divides the area where the digital system circuit is formed and the area where the analog system circuit is formed on the same insulating metal board to form the insulating metal board. By setting the conductive sheet and the sealing container to the same potential, it is possible to shield each of the analog circuit and the digital circuit.
（ヘ）実施例 以下に第１図に示した実施例に基づいて本考案の混成集
積回路を詳細に説明する。(F) Embodiment Hereinafter, the hybrid integrated circuit of the present invention will be described in detail based on the embodiment shown in FIG.
本考案の混成集積回路を第１図に示す如く、絶縁処理さ
れた金属基板（１）と、金属基板（１）上に形成された
アナログ系回路（２）及びデジタル系回路（３）と、ア
ナログ系回路（２）及びデジタル系回路（３）領域を区
画する導電性シート（４）と、金属基板（１）と固着一
体化される金属製の封止容器（５）とから構成される。As shown in FIG. 1, the hybrid integrated circuit of the present invention includes an insulated metal substrate (1), an analog circuit (2) and a digital circuit (3) formed on the metal substrate (1). It is composed of a conductive sheet (4) partitioning the analog circuit (2) and digital circuit (3) regions, and a metal sealing container (5) fixedly integrated with the metal substrate (1). .
金属基板（１）はアルミニウム基板が用いられ、その表
面には絶縁基板とするために陽極酸化によって酸化アル
ミニウム膜が形成されている。金属基板（１）はアルミ
ニウム基板に限定されるものではなく、例えば、鉄基
板、ケイ素鋼板、ホーロー基板等を用いることが可能で
ある。An aluminum substrate is used as the metal substrate (1), and an aluminum oxide film is formed on the surface of the metal substrate by anodic oxidation so as to serve as an insulating substrate. The metal substrate (1) is not limited to the aluminum substrate, and, for example, an iron substrate, a silicon steel plate, a enamel substrate or the like can be used.
金属基板（１）上には所望形状の導電路（６）が形成さ
れ、その導電路（６）上にはIC、トランジスタ、LSI等
の複数の半導体素子（７）が固着される。本実施例にお
いて、導電路（６）上に固着された半導体素子（７）は
デジタル系とアナログ系とに区画する様に固着配置され
ている。即ち、金属基板（１）上にはデジタル系回路領
域（２）とアナログ系回路領域（３）とが区画する様に
形成されている。A conductive path (6) having a desired shape is formed on the metal substrate (1), and a plurality of semiconductor elements (7) such as ICs, transistors, LSIs, etc. are fixed on the conductive path (6). In this embodiment, the semiconductor element (7) fixed on the conductive path (6) is fixedly arranged so as to be divided into a digital system and an analog system. That is, the digital circuit area (2) and the analog circuit area (3) are formed so as to be partitioned on the metal substrate (1).
本考案の特徴とするところはデジタル系回路領域（２）
とアナログ系回路領域（３）とを区画する区画領域上に
導電性シート（４）を配置して導電性シート（４）と金
属基板（１）とを接続させるところにある。The feature of the present invention lies in the digital circuit area (2)
The conductive sheet (4) is arranged on the partition area that partitions the analog circuit area (3) and the conductive circuit sheet (4) to connect the metal substrate (1).
導電性シート（４）はゴム又は合成樹脂から成る絶縁シ
ートで第２図に示す如く、帯状に形成され、その厚さ方
向に線状導体（12）が複数本埋め込まれており、帯状の
導電性シート（４）の両面からは複数の線状導体（12）
が突出されている。斯る導電性シート（４）は特開昭62
-229714号公報、特開昭59-58709号公報に記載されてい
る。The conductive sheet (4) is an insulating sheet made of rubber or synthetic resin, and is formed in a band shape as shown in FIG. 2, and a plurality of linear conductors (12) are embedded in the thickness direction of the conductive sheet (4). A plurality of linear conductors (12) from both sides of the elastic sheet (4)
Is projected. Such a conductive sheet (4) is disclosed in JP-A-62 / 62.
-229714 and JP-A-59-58709.
斯る導電性シート（４）はデジタル系回路領域（２）と
アナログ系回路領域（３）とを区画するものであり、そ
の形状は帯状、コ字状あるいはＬ字状とその形状は任意
に設定することが可能である。また、導電性シート
（４）が配置される区画領域上には導電性シート（４）
と基板（１）とを接続するための導電路（６′）が形成
されている。その導電路（６′）が形成される近傍には
金属基板（１）の金属部分を露出させるためのザグリ部
（13）が形成され、ザグリ部（13）と導電路（６′）と
はワイヤ線（14）で接続されている。Such a conductive sheet (4) divides the digital circuit area (2) and the analog circuit area (3), and its shape is a band shape, a U shape or an L shape and its shape is arbitrary. It is possible to set. In addition, the conductive sheet (4) is provided on the partition area where the conductive sheet (4) is arranged.
Conductive paths (6 ') for connecting the substrate and the substrate (1) are formed. A spot facing portion (13) for exposing the metal portion of the metal substrate (1) is formed in the vicinity where the conductive path (6 ') is formed, and the spot facing portion (13) and the conductive path (6') are formed. Connected by wire lines (14).
導電路（６′）上に配置される導電性シート（４）は金
属製の封止容器（５）と基板（１）とで挾持される。封
止容器（５）には導電性シート（４）を基板（１）固着
時までに保持するための凹部（15）が設けられている。
この凹部（15）内に導電性シート（11）の一方を挿入配
置した際、導電性シート（４）の他方の先端部は封止容
器（５）の段差部（16）より若干突出する様になる。The conductive sheet (4) arranged on the conductive path (6 ') is held between the metal sealing container (5) and the substrate (1). The sealing container (5) is provided with a recess (15) for holding the conductive sheet (4) by the time the substrate (1) is fixed.
When one of the conductive sheets (11) is inserted and arranged in the recess (15), the other end of the conductive sheet (4) slightly protrudes from the step (16) of the sealing container (5). become.
金属基板（１）と金属製の封止容器（５）とをビス止め
等の手段によって固着一体化することで、導電性シート
（４）は封止容器（５）と基板（１）とによって挾持接
続され、基板（１）、封止容器（５）、導電性シート
（４）とが夫々共通（同電位）となり内外部のノイズを
遮蔽することができる様になる。By fixing and integrating the metal substrate (1) and the metal sealing container (5) by means such as screwing, the conductive sheet (4) is formed by the sealing container (5) and the substrate (1). It is held and connected, and the substrate (1), the sealing container (5), and the conductive sheet (4) are in common with each other (at the same potential), so that noise inside and outside can be shielded.
（ト）考案の効果 以上に詳述した如く、本考案に依れば、同一基板上にデ
ジタル系回路とアナログ系回路が形成された混成集積回
路において、アナログ系回路領域とデジタル系回路領域
とを導電性シートで区画して、金属製の封止容器で封止
することにより、基板、容器、導電性シートが夫々同電
位となりデジタル系及びアナログ系回路の夫々の回路を
同一基板上にシールド効果を有して形成することがで
き、従来の如き、二枚基板を必要とせずに１枚の基板で
デジタル系及びアナログ系回路を形成することができ
る。(G) Effect of the Invention As described in detail above, according to the present invention, in a hybrid integrated circuit in which a digital system circuit and an analog system circuit are formed on the same substrate, an analog system circuit area and a digital system circuit area are provided. Are separated by a conductive sheet and sealed with a metal sealing container so that the substrate, container, and conductive sheet have the same potential, and the digital and analog circuits are shielded on the same substrate. It is possible to form with effect, and it is possible to form a digital system and an analog system circuit with one substrate without the need for two substrates unlike the conventional case.
第１図は本考案の混成集積回路を示す断面図、第２図は
本実施例で用いる導電性シートを示す斜視図、第３図は
従来例を示す断面図である。 （１）……絶縁金属基板、（２）……デジタル系回路領
域、（３）……アナログ系回路領域、（４）……導電性
シート、（５）……封止容器。FIG. 1 is a sectional view showing a hybrid integrated circuit of the present invention, FIG. 2 is a perspective view showing a conductive sheet used in this embodiment, and FIG. 3 is a sectional view showing a conventional example. (1) ... Insulating metal substrate, (2) ... Digital circuit area, (3) ... Analog circuit area, (4) ... Conductive sheet, (5) ... Sealing container.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭59−58709（ＪＰ，Ａ) 実願 昭47−48319号（実開 昭49− 7453号）のマイクロフィルム ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References Japanese Patent Application Laid-Open No. 59-58709 (JP, A) Japanese Patent Application No. 47-48319 (Japanese Utility Model Publication No. 49-7453) Microfilm
Claims (2)
属基板上に実装されたデジタル系回路およびアナログ系
回路と、この金属基板と一体化される金属封止容器とを
備えた混成集積回路に於て、 前記デジタル系回路が形成される領域と前記アナログ系
回路が形成される領域との間には、前記金属基板と電気
的にコンタクトした導電路が設けられ、この導電路上に
設けられた導電性シートが、前記金属基板と前記金属封
止容器で挾持されることで、この導電性シート、金属基
板および金属封止容器を同電位とし、且つ前記デジタル
系回路が形成される領域と前記アナログ系回路が形成さ
れる領域を区画することを特徴とした混成集積回路装
置。1. A hybrid integrated system comprising a metal substrate whose surface is insulated, digital and analog circuits mounted on the metal substrate, and a metal sealing container integrated with the metal substrate. In the circuit, a conductive path electrically contacting the metal substrate is provided between a region where the digital system circuit is formed and a region where the analog system circuit is formed. The conductive sheet is sandwiched between the metal substrate and the metal encapsulation container so that the conductive sheet, the metal substrate and the metal encapsulation container have the same potential, and the digital system circuit is formed. And a region in which the analog circuit is formed is divided, and a hybrid integrated circuit device.
クトは、この導電路の近傍に露出した前記金属基板とこ
の導電路をワイヤ線で接続することにより達成される請
求項１記載の混成集積回路装置。2. The hybrid according to claim 1, wherein the electrical contact between the metal substrate and the conductive path is achieved by connecting the metal substrate exposed in the vicinity of the conductive path and the conductive path with a wire line. Integrated circuit device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148152U JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148152U JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0268469U JPH0268469U (en) | 1990-05-24 |
| JPH0638438Y2 true JPH0638438Y2 (en) | 1994-10-05 |
Family
ID=31419210
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988148152U Expired - Lifetime JPH0638438Y2 (en) | 1988-11-14 | 1988-11-14 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0638438Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103378068A (en) * | 2012-04-17 | 2013-10-30 | 太阳诱电株式会社 | Circuit module and method of manufacturing the same |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS497453U (en) * | 1972-04-24 | 1974-01-22 | ||
| JPS6031043B2 (en) * | 1983-08-22 | 1985-07-19 | 東レ株式会社 | Anisotropic conductive sheet |
-
1988
- 1988-11-14 JP JP1988148152U patent/JPH0638438Y2/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| 実願昭４７−４８３１９号（実開昭４９−７４５３号）のマイクロフィルム |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103378068A (en) * | 2012-04-17 | 2013-10-30 | 太阳诱电株式会社 | Circuit module and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0268469U (en) | 1990-05-24 |
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