JPH024934B2 - - Google Patents

Info

Publication number
JPH024934B2
JPH024934B2 JP59025160A JP2516084A JPH024934B2 JP H024934 B2 JPH024934 B2 JP H024934B2 JP 59025160 A JP59025160 A JP 59025160A JP 2516084 A JP2516084 A JP 2516084A JP H024934 B2 JPH024934 B2 JP H024934B2
Authority
JP
Japan
Prior art keywords
processor
signal
common memory
processors
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59025160A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60169971A (ja
Inventor
Keiichi Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP59025160A priority Critical patent/JPS60169971A/ja
Publication of JPS60169971A publication Critical patent/JPS60169971A/ja
Publication of JPH024934B2 publication Critical patent/JPH024934B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
JP59025160A 1984-02-15 1984-02-15 マルチプロセツサシステム Granted JPS60169971A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59025160A JPS60169971A (ja) 1984-02-15 1984-02-15 マルチプロセツサシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59025160A JPS60169971A (ja) 1984-02-15 1984-02-15 マルチプロセツサシステム

Publications (2)

Publication Number Publication Date
JPS60169971A JPS60169971A (ja) 1985-09-03
JPH024934B2 true JPH024934B2 (mo) 1990-01-31

Family

ID=12158265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59025160A Granted JPS60169971A (ja) 1984-02-15 1984-02-15 マルチプロセツサシステム

Country Status (1)

Country Link
JP (1) JPS60169971A (mo)

Also Published As

Publication number Publication date
JPS60169971A (ja) 1985-09-03

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