JPH0246000A - Structure of mounting substrate laminated in a plurality of sheets - Google Patents

Structure of mounting substrate laminated in a plurality of sheets

Info

Publication number
JPH0246000A
JPH0246000A JP19648588A JP19648588A JPH0246000A JP H0246000 A JPH0246000 A JP H0246000A JP 19648588 A JP19648588 A JP 19648588A JP 19648588 A JP19648588 A JP 19648588A JP H0246000 A JPH0246000 A JP H0246000A
Authority
JP
Japan
Prior art keywords
substrate
height
component
sheets
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19648588A
Other languages
Japanese (ja)
Inventor
Hiroyuki Kamiya
神谷　裕之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP19648588A priority Critical patent/JPH0246000A/en
Publication of JPH0246000A publication Critical patent/JPH0246000A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)

Abstract

PURPOSE:To minimize a total thickness of a mounting substrate which is laminated in a plurality of sheets by determining a locating of a part to be mounted to the substrate considering sizes of height, length and width of the part. CONSTITUTION:A part 1 (the highest part among those mounted to a substrate 3) is arranged between substrate 3 at a position above a part 2 (the lowest part among those mounted to the substrate 3) which is mounted to opposite substrates 3. According to this constitution, a total thickness can be minimized to a sum of a height A of the part 1, a height B or the part 2, twice a thickness (t) of the substrate 3 and a clearance between the part 1 and the part 2.

Description

【発明の詳細な説明】 し産業上の利用分野］ 本発明は、部品を実装した基板を複数枚積層した実装基
板溝遣Ｖｃ、関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mounting board groove Vc in which a plurality of boards on which components are mounted are stacked.

による凸凹を組み合せたことにより、複数枚積層した実
装基板の総厚を薄くしたものである。By combining the unevenness, the total thickness of the multi-layered mounting board is reduced.

［従来の技術］ 従来、第２図に示すように部品を搭載した基板を積み重
ねた実装基板構造であった。[Prior Art] Conventionally, as shown in FIG. 2, a mounting board structure has been used in which boards on which components are mounted are stacked.

［発明が解決しようとする課題］ しかし、従来の実装基板構造では、全体の総厚Ｈは、■
部品１の高さＡの２倍と基板３の厚みｔの２倍と積層す
る場合のクリアランスＣの和であり、厚みが厚（なると
いう問題点を有していた。[Problem to be solved by the invention] However, in the conventional mounting board structure, the total thickness H is
This is the sum of twice the height A of the component 1, twice the thickness t of the substrate 3, and the clearance C when stacking, which has the problem that the thickness becomes thick.

そこで、本発明は従来のこのような問題点を解決するも
ので、その目的とするところは全体の総厚を薄（するこ
とにある。Therefore, the present invention is intended to solve these conventional problems, and its purpose is to reduce the total thickness of the entire device.

［発明の概要コ 本発明は、部品を実装した基板を複数枚積層した実装基
板構造において、実装されている部品の位置を部品の高
さ、横、縦の寸法を考慮し、部品［課源を解決するため
の手段］ 上記問題点を解決するために、本発明の複数枚積層した
実装基板構造は、実装基板を複数枚積層したものにおい
て、実装されている部品の位置を部品の高さ、横、縦の
寸法を考慮し、部品による凸凹を組み合せたことを特徴
とする。[Summary of the Invention] The present invention provides a mounting board structure in which a plurality of boards on which components are mounted are stacked, and the position of the mounted components is determined by considering the height, width, and vertical dimensions of the components. [Means for Solving] In order to solve the above problems, the mounting board structure of the present invention in which a plurality of mounting boards are stacked is arranged such that the position of the mounted component is adjusted to the height of the component. , is characterized by taking into consideration the horizontal and vertical dimensions and combining the unevenness of the parts.

［作用コ 上記のように構成された実装基板構造にすれば、複数枚
積層したものの総厚は、各基板の一番高い部品が各基板
の間に入り、その間隔はその間の一番高い部品とその部
品に同じ位置にある部品（基板）及び部品間のクリアラ
ンスによるものと積層した一番上と下の基板に搭載した
部品の高さの和となり厚みを最小にすることができる。[Effects] If the mounting board structure is configured as described above, the total thickness of a stack of multiple boards will be such that the highest component of each board is between the two boards, and the distance between them is equal to The thickness can be minimized by the sum of the parts (substrates) located at the same position as the parts, the clearance between the parts, and the heights of the parts mounted on the top and bottom laminated boards.

［実施例コ 以下に本発明の実施例を図面にもとづいて説明する。第
１図において、■部品１（基板に実装されている部品で
一番高い部品）を基板３０間に入れるように位置する。[Embodiments] Examples of the present invention will be described below based on the drawings. In FIG. 1, component 1 (the highest component mounted on the board) is placed between the boards 30.

また、その位置は、向いあう基板３に実装されている■
部品２（基板に実装されている部品で一番低い部品）の
上に（るようにする。このようにすることで、総厚を■
部品１の高さＡと■部品２の高さＢと基板３の厚みｔの
２倍と■部品１と■部品２のクリアランスの和の最小の
厚みにすることができる。Also, its position is that it is mounted on the facing board 3.
Place it on top of component 2 (the lowest component mounted on the board).By doing this, the total thickness can be reduced to
The minimum thickness can be the sum of the height A of component 1, (2) the height B of component 2, twice the thickness t of substrate 3, and (2) the sum of the clearance between component 1 and (2) component 2.

［発明の効果］ 本発明は、以上説明したように、基板に実装されている
部品の高さ、横、縦の寸法を考慮して部品の位置を決め
るということにより複数枚積層した実装基板の総厚を最
小限にする効果がある。[Effects of the Invention] As explained above, the present invention is able to improve the performance of a multi-layered mounting board by determining the position of the components in consideration of the height, width, and vertical dimensions of the components mounted on the board. This has the effect of minimizing the total thickness.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図（α）（ｂ）は、本発明にかかる実装された部品
位置の正面図、平面図、第２図（α）（ｈ）は、従来の
実装された部品位置の正面図、平面図である。 １・・・・・・・・・■部品 ２・・・・・・・・■部品 ６・・・・・・・・・基　板 Ａ・・・・・・・・・■部品の高さ Ｂ・・・・・・・・・■部品の高さ Ｃ・・・・・・・・・クリアランス ｔ・・・・・・・・基板の厚み 以上FIGS. 1(α) and (b) are front views and plan views of the mounted component positions according to the present invention, and FIGS. 2(α) and (h) are front views and plan views of the conventional mounted component positions. It is a diagram. 1......■Part 2......■Part 6...Board A......■Height of the part B・・・・・・・・・■Height of parts C・・・・・・Clearance t・・・・・・More than the thickness of the board

Claims (1)

【特許請求の範囲】[Claims] 実装された基板を複数枚積層したものにおいて、実装さ
れている部品の位置を部品の高さ、横、縦の寸法を考慮
し、部品による凸凹を組み合せたことを特徴とする複数
枚積層した実装基板構造。Mounting in which multiple boards are stacked, where the position of the mounted components is determined by considering the height, width, and vertical dimensions of the components, and combining the unevenness caused by the components. Substrate structure.
JP19648588A 1988-08-06 1988-08-06 Structure of mounting substrate laminated in a plurality of sheets Pending JPH0246000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19648588A JPH0246000A (en) 1988-08-06 1988-08-06 Structure of mounting substrate laminated in a plurality of sheets

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19648588A JPH0246000A (en) 1988-08-06 1988-08-06 Structure of mounting substrate laminated in a plurality of sheets

Publications (1)

Publication Number Publication Date
JPH0246000A true JPH0246000A (en) 1990-02-15

Family

ID=16358565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19648588A Pending JPH0246000A (en) 1988-08-06 1988-08-06 Structure of mounting substrate laminated in a plurality of sheets

Country Status (1)

Country Link
JP (1) JPH0246000A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019153730A (en) * 2018-03-06 2019-09-12 株式会社リコー Mounting substrate arrangement structure, imaging element substrate arrangement structure, imaging apparatus, and imaging apparatus manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019153730A (en) * 2018-03-06 2019-09-12 株式会社リコー Mounting substrate arrangement structure, imaging element substrate arrangement structure, imaging apparatus, and imaging apparatus manufacturing method

Similar Documents

Publication Publication Date Title
JPS63153849A (en) Semiconductor device
JPH0246000A (en) Structure of mounting substrate laminated in a plurality of sheets
US4826147A (en) Paper feed cassette
JPH06216305A (en) Stacked electronic part
JPH1149261A (en) Board material-housing frame construction
JPH0555766A (en) Structure for mounting printed boards
JPH05275612A (en) Electronic part assembly
JPS5998699U (en) Positioning device for electronic component assembly boards
JPH08244877A (en) Tray for transport and storage of semiconductor element
JPS6314457Y2 (en)
JPH04206797A (en) Semiconductor device
JP3167170B2 (en) Tile alignment equipment
JPS60183438U (en) Semiconductor substrate storage cassette
JPS6089912A (en) Multilayer board containing condenser
JPH0429587Y2 (en)
JPH01318294A (en) Shelf-arranged type printed board
JPH0438543Y2 (en)
JPS5873191A (en) Mounting structure for hybrid integrated circuit device
JPS59195554U (en) Detection part structure of gas detection device
JPH0513134A (en) Multiple mounting method
JPH0625442U (en) Floor board support for double floors
JPS5922844U (en) Simple flooring
JPS60149733U (en) Tightening device for polymerized printed wiring boards
JPH05270182A (en) Ic card
JPS58149610U (en) Table leg mounting structure