JPS5873191A - Mounting structure for hybrid integrated circuit device - Google Patents
Mounting structure for hybrid integrated circuit deviceInfo
- Publication number
- JPS5873191A JPS5873191A JP17223581A JP17223581A JPS5873191A JP S5873191 A JPS5873191 A JP S5873191A JP 17223581 A JP17223581 A JP 17223581A JP 17223581 A JP17223581 A JP 17223581A JP S5873191 A JPS5873191 A JP S5873191A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit device
- mounting structure
- lead terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明＃′ｉ、混成集積回路装置を回路基板に取付ける
実装構造Ｋｙｋ４する。DETAILED DESCRIPTION OF THE INVENTION Invention #'i is a mounting structure Kyk4 for attaching a hybrid integrated circuit device to a circuit board.
従来、混成集積回路装置を回路基板に取付けるには、シ
ングルインライン型パッケージ、デュアルインライン型
パッケージまたはフラット型パッケージであるかを問わ
ず、−個の回路基板、例えばプリント配線基板に実装さ
れていた。この場合、パッケージ本体から一方向のみに
リード端子が引き出されているシングルインライン型パ
ッケージは高い実装密度をもって実装できるが、対をな
して両方向にリード端子が引き出されたデュアルインラ
イン型パッケージまたはフラット型パッケージは、−個
の集権回路装置当夛の所要面積が大きくなり、実装密度
は低くなる。しかし、設計の自由度について見れば１両
方向にリード端子のあるデュアルインライン型またはフ
ラット型の方が有利である。Traditionally, hybrid integrated circuit devices have been mounted on circuit boards, whether in single-in-line packages, dual-in-line packages, or flat packages, on -1 circuit boards, such as printed wiring boards. In this case, a single in-line package in which the lead terminals are drawn out in only one direction from the package body can be mounted with high packaging density, but a dual in-line package or a flat package in which the lead terminals are drawn out in both directions in pairs can be mounted. In this case, the area required for the - number of centralized circuit devices becomes large, and the packaging density becomes low. However, in terms of design freedom, a dual in-line type or flat type with lead terminals in both directions is more advantageous.
第１図はシングルインライン型パッケージの混成集積回
路装置を回路基板に実装した状態を示す斜視図である。FIG. 1 is a perspective view showing a hybrid integrated circuit device in a single in-line package mounted on a circuit board.
図において、パッケージ本体１ｍの一つの側面から一列
に外方に引き出された複数のリード端子１ｂ、ｌｂ、・
・・・・・は回路基＠４の貫通孔に挿入され、はんだ付
けで固着実装されている。このときの所要実装置ｌｉ！
］積はパッケージ本体１ａの側面の面積で済むため、小
さい回路基板に多〈の混成集積回路装置が実装できるの
は明らかである。これに対し、デクアルインライン型パ
ッケージの混成集積回路装置の場合は、シングルインラ
イン型の狭い９０面部面積対し、最小限パッケージ本体
の広い底面の面積を必要とするから、シングルインライ
ン型に比べ一個当シ数倍の実装面積を必要とする。但し
、シングルインライン型の方は設計の自＋１３度は非常
に窮屈にならざるを得ない。In the figure, a plurality of lead terminals 1b, lb, .
... is inserted into the through hole of the circuit board @4, and is firmly mounted by soldering. The required actual device li at this time!
Since the product is only the area of the side surface of the package body 1a, it is clear that a large number of hybrid integrated circuit devices can be mounted on a small circuit board. On the other hand, in the case of a hybrid integrated circuit device with a dual-in-line type package, a minimum area of the wide bottom surface of the package body is required compared to the narrow 90-sided area of the single-in-line type, so one unit per unit is larger than that of the single-in-line type. It requires a mounting area that is several times as large. However, for the single in-line type, the design angle of +13 degrees must be extremely cramped.
本発明の目的は、対をなして両方向にリード端子の引き
出された混成集積回路装置を回路基板に実装するに際し
、設計の自由度の利点を生かしながらさらに高密度の莢
装を可能とした実装構造を提供するにある。An object of the present invention is to enable higher-density packaging while taking advantage of design freedom when mounting a hybrid integrated circuit device in which lead terminals are drawn out in both directions in pairs on a circuit board. It is there to provide structure.
本発明の実装構造は、パッケージ本体から一方の外方向
とこれとけ反対の他方の外方向とへ対をなしてそれぞれ
引き出されたリード端子をもつ混成集積回路装置の、前
記一方の側のリード端子群と他方の側のリード端子群と
がそれぞれ別個の回路基板に取付けられている構造であ
る。The mounting structure of the present invention provides lead terminals on one side of a hybrid integrated circuit device having lead terminals drawn out in pairs from a package body in one direction and in the opposite direction. The group and the lead terminal group on the other side are each attached to separate circuit boards.
つぎに本発明を実施例によシ説明する。Next, the present invention will be explained using examples.
第２図は本発明の一実施例を示す平面図である。FIG. 2 is a plan view showing an embodiment of the present invention.
第２図において、パッケージ本体・２ａの相対する一対
の＠１面のうちの一方の側面から複数のリード端子３ａ
、３ａ、・・川・が外方に引き出され、他方の側面から
し数のリード端子３ｂ、３ｂ、・・・・・・がいる。In FIG. 2, a plurality of lead terminals 3a are connected to one side of the pair of opposing @1 surfaces of the package body 2a.
, 3a, . . . are drawn outward, and on the other side there are a number of lead terminals 3b, 3b, .
第３１ｄｉｔ多数の混成集積回路装置を２個の回路基板
に取付けた実施例の側面図である。第３図において、第
２し１−に示す混成集積回路装置２の複数個を重ねた形
にして、回路基板４ａと４ｂの間において、−力のリー
ド端子群は回路基板４８Ｋ。31 is a side view of an embodiment in which a large number of hybrid integrated circuit devices are attached to two circuit boards; FIG. In FIG. 3, a plurality of hybrid integrated circuit devices 2 shown in 2nd line 1- are stacked, and between circuit boards 4a and 4b, a group of lead terminals is connected to a circuit board 48K.
他方のリード端子群は回路基板４ｂに取付けている。こ
のような実装構造によれば、−個当シの所要実装面積は
、パッケージ本体の面積の小さい一つの側面だけで済む
から、パッケージ本体の底面を回路基板面と平行に取付
けた従来の実装構造に比べ大幅に実装密度が高められる
。また、取付は面が二つに分かれているので設計の自由
度も第１図に示すシングルインライン型に比べ大幅に改
善されるという効果がある。The other lead terminal group is attached to the circuit board 4b. According to such a mounting structure, the required mounting area for the individual parts is only one side surface of the package body, which has a small area. The packaging density can be significantly increased compared to . Furthermore, since the mounting surface is divided into two, the degree of freedom in design is greatly improved compared to the single in-line type shown in FIG. 1.
第１図はシングルインライン型パッケージの集積回路装
置を回路基板に実装した状態を示す斜視図、＃２図は１
侮１の混成集積回路装置を２個の回路基板にわたシ取付
けた本発明の実施例を示す平面図、第３図は、第２図の
混成集積回路―置を複数個重ねた形にしたときの本発明
の実施例を示す側面図である。
１・・・・・・シングルインライン型パッケージ集＆回
路装［１，２・・・・・・両方向リード端子の集積回路
装置、２ａ・・・・・・パッケージ本体、３［・・・・
・一方参′のＩＪ−ド端子、３ｂ・・・・・・他方側の
リード端子、４・・・・・・回路基板、４［・・・・・
一方側の回路基板、４ｂ・・・・・・他方側の回路基板
。
η グ し≧１
七１つ ２ Ｕ≧１
ｕ３にミ１Figure 1 is a perspective view showing a single in-line package integrated circuit device mounted on a circuit board, Figure #2 is a
FIG. 3 is a plan view showing an embodiment of the present invention in which the first hybrid integrated circuit device is mounted across two circuit boards. FIG. 2 is a side view showing an embodiment of the present invention. 1... Single in-line package collection & circuit assembly [1, 2... Integrated circuit device with bidirectional lead terminals, 2a... Package body, 3 [...
・IJ-de terminal on one side, 3b...Lead terminal on the other side, 4...Circuit board, 4 [......
Circuit board on one side, 4b...circuit board on the other side. η Gu Shi≧1 71 2 U≧1 U3 and Mi1
Claims (1)
の外方向とへ対をなしてそれぞれ引き出されたリード端
子群をもつ混成集積回路装置の。 前記一方の側のリード端子群と他方の側のリード端子群
とがそれぞれ別個の回路基板に取付けられていることを
特徴とする混成集積回路装置の実装構造。[Scope of Claims] A hybrid integrated circuit device having a group of lead terminals drawn out in pairs from a package body in one direction and in the opposite direction. A mounting structure for a hybrid integrated circuit device, wherein the lead terminal group on one side and the lead terminal group on the other side are respectively attached to separate circuit boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17223581A JPS5873191A (en) | 1981-10-28 | 1981-10-28 | Mounting structure for hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17223581A JPS5873191A (en) | 1981-10-28 | 1981-10-28 | Mounting structure for hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5873191A true JPS5873191A (en) | 1983-05-02 |
Family
ID=15938111
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17223581A Pending JPS5873191A (en) | 1981-10-28 | 1981-10-28 | Mounting structure for hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5873191A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS619871U (en) * | 1984-06-21 | 1986-01-21 | 株式会社東芝 | flat package unit |
| JPS6219730U (en) * | 1985-07-22 | 1987-02-05 |
-
1981
- 1981-10-28 JP JP17223581A patent/JPS5873191A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS619871U (en) * | 1984-06-21 | 1986-01-21 | 株式会社東芝 | flat package unit |
| JPS6219730U (en) * | 1985-07-22 | 1987-02-05 |
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