JPH0245328B2 - - Google Patents

Info

Publication number
JPH0245328B2
JPH0245328B2 JP58020660A JP2066083A JPH0245328B2 JP H0245328 B2 JPH0245328 B2 JP H0245328B2 JP 58020660 A JP58020660 A JP 58020660A JP 2066083 A JP2066083 A JP 2066083A JP H0245328 B2 JPH0245328 B2 JP H0245328B2
Authority
JP
Japan
Prior art keywords
film
polycrystalline silicon
region
oxide film
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58020660A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59147454A (ja
Inventor
Akihiro Kanda
Hideaki Sadamatsu
Akira Matsuzawa
Michihiro Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58020660A priority Critical patent/JPS59147454A/ja
Priority to US06/578,036 priority patent/US4536950A/en
Publication of JPS59147454A publication Critical patent/JPS59147454A/ja
Publication of JPH0245328B2 publication Critical patent/JPH0245328B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212—Through-implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials

Landscapes

  • Bipolar Transistors (AREA)
JP58020660A 1983-02-10 1983-02-10 半導体装置の製造方法 Granted JPS59147454A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58020660A JPS59147454A (ja) 1983-02-10 1983-02-10 半導体装置の製造方法
US06/578,036 US4536950A (en) 1983-02-10 1984-02-08 Method for making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58020660A JPS59147454A (ja) 1983-02-10 1983-02-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59147454A JPS59147454A (ja) 1984-08-23
JPH0245328B2 true JPH0245328B2 (enFirst) 1990-10-09

Family

ID=12033361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58020660A Granted JPS59147454A (ja) 1983-02-10 1983-02-10 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59147454A (enFirst)

Also Published As

Publication number Publication date
JPS59147454A (ja) 1984-08-23

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