JPH0241470U - - Google Patents
Info
- Publication number
- JPH0241470U JPH0241470U JP11854888U JP11854888U JPH0241470U JP H0241470 U JPH0241470 U JP H0241470U JP 11854888 U JP11854888 U JP 11854888U JP 11854888 U JP11854888 U JP 11854888U JP H0241470 U JPH0241470 U JP H0241470U
- Authority
- JP
- Japan
- Prior art keywords
- circuit pattern
- leads
- soldered
- irregularities
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
Description
第1図は本考案の実施例を示す平面図、第2図
は従来の回路パターンを示す平面図である。
1,1′……回路、2,2′……リード。
FIG. 1 is a plan view showing an embodiment of the present invention, and FIG. 2 is a plan view showing a conventional circuit pattern. 1, 1'...Circuit, 2, 2'...Lead.
Claims (1)
ける回路パターンに於いて、前記リードがはんだ
付けされる回路パターンに凸凹を設けたことを特
徴とする回路パターン。 1. A circuit pattern on a printed circuit board of a component with multi-lead leads for surface mounting, characterized in that the circuit pattern to which the leads are soldered is provided with irregularities.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11854888U JPH0241470U (en) | 1988-09-09 | 1988-09-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11854888U JPH0241470U (en) | 1988-09-09 | 1988-09-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0241470U true JPH0241470U (en) | 1990-03-22 |
Family
ID=31362987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11854888U Pending JPH0241470U (en) | 1988-09-09 | 1988-09-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0241470U (en) |
-
1988
- 1988-09-09 JP JP11854888U patent/JPH0241470U/ja active Pending