JPH0236278Y2 - - Google Patents
Info
- Publication number
- JPH0236278Y2 JPH0236278Y2 JP1984059024U JP5902484U JPH0236278Y2 JP H0236278 Y2 JPH0236278 Y2 JP H0236278Y2 JP 1984059024 U JP1984059024 U JP 1984059024U JP 5902484 U JP5902484 U JP 5902484U JP H0236278 Y2 JPH0236278 Y2 JP H0236278Y2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- gold
- silver
- wire bonding
- gold plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 27
- 238000007747 plating Methods 0.000 claims description 27
- 229910052737 gold Inorganic materials 0.000 claims description 25
- 239000010931 gold Substances 0.000 claims description 25
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 11
- 229910052709 silver Inorganic materials 0.000 claims description 11
- 239000004332 silver Substances 0.000 claims description 11
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 239000000758 substrate Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- QDWJUBJKEHXSMT-UHFFFAOYSA-N boranylidynenickel Chemical compound [Ni]#B QDWJUBJKEHXSMT-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 150000002343 gold Chemical class 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000002816 nickel compounds Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005987 sulfurization reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Description
【考案の詳細な説明】
［産業上の利用分野］
本考案は、プリント基板に関し、特には集積回
路（IC）を金ワイヤでボンデイングするための
ワイヤボンデイング部を含む回路パターンを設け
たプリント基板に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a printed circuit board, and particularly to a printed circuit board provided with a circuit pattern including a wire bonding part for bonding an integrated circuit (IC) with gold wire. It is something.
［従来の技術とその問題点］
従来、プリント基板にICを金ワイヤでボンデ
イングして接続するには、基板の銅箔パターン上
に下地ニツケルメツキを施し、その上に更に高純
度金メツキ（通常「ソフト金メツキ」と呼ばれて
いる。）を1μｍ以上の厚さで設けなければならな
かつた。また、回路パターンの中、ワイヤボンデ
イング部以外の接点部分や部品実装パツド部分な
どにもすべて1μｍ以上の厚さでソフト金メツキ
が施されるため、コスト高を招来していた。[Conventional technology and its problems] Conventionally, in order to bond and connect an IC to a printed circuit board with gold wire, a base nickel plating is applied on the copper foil pattern of the board, and then high-purity gold plating (usually 1 μm or more thick. In addition, soft gold plating of 1 μm or more is applied to all contact areas other than wire bonding areas and component mounting pads in the circuit pattern, leading to high costs.
つまり、金ワイヤのボンデイング成功率（ボン
ダビリテイ）を高めるには、十分な厚さの高純度
金メツキが必要となる。基板の製造コストは高純
度金の使用量に大きく左右されるから、高純度金
の使用量を少なくして製造コストを低減すべく
色々な試みが提案されている。 In other words, in order to increase the bonding success rate (bondability) of gold wire, a sufficiently thick high-purity gold plating is required. Since the manufacturing cost of a substrate largely depends on the amount of high-purity gold used, various attempts have been proposed to reduce the manufacturing cost by reducing the amount of high-purity gold used.
例えば、実開昭57−163742号公報では、下地メ
ツキとしてニツケル化合物（特にはボロンニツケ
ル）を施し、その上に0.5μｍ以下の金または1μｍ
以下の銀を単独メツキすることにより、ボンデイ
ング成功率99.5％が得られることが開示されてい
る。しかし、実際には、この程度のボンデイング
成功率では、ボンデイングのパツド数が多いIC
の場合、かなりの接続不良が発生するのが実情で
ある。 For example, in Japanese Utility Model Application Publication No. 57-163742, a nickel compound (particularly boron nickel) is applied as the base plating, and then gold of 0.5 μm or less or gold of 1 μm or less is applied on top of that.
It is disclosed that a bonding success rate of 99.5% can be obtained by plating the following silver alone. However, in reality, with this level of bonding success rate, ICs with a large number of bonding pads
In this case, the reality is that a considerable amount of connection failure occurs.
また、実開昭48−79253号公報では、ワイヤボ
ンデインングされる電極部分を、銀−パラジウム
と金の２層構造とすることが開示されているが、
これは実際には用途がセラミツクスを使用した厚
膜焼成基板に特定され、樹脂基板には適さない問
題を有している。 Furthermore, Japanese Utility Model Application No. 48-79253 discloses that the electrode portion to be wire bonded has a two-layer structure of silver-palladium and gold.
In reality, this method has a problem in that its application is limited to thick film fired substrates using ceramics, and it is not suitable for resin substrates.
［考案の目的］
本考案は、上記従来技術の実情に鑑みて、高純
度金メツキを薄くしても十分なボンデイング成功
率を確保することができるプリント基板を提供す
ることを目的とするものである。[Purpose of the invention] In view of the above-mentioned state of the prior art, the purpose of the invention is to provide a printed circuit board that can ensure a sufficient bonding success rate even if the high-purity gold plating is made thinner. be.
［目的を達成するための手段］
上記目的を達成するために、本考案のプリント
基板は、回路パターンのワイヤボンデイング部
に、銀メツキとそれを被覆する高純度金メツキと
からなる２層被膜が形成してあり、銀メツキは２
〜4μｍの厚さに、高純度金メツキは0.2〜0.3μｍ
の厚さにそれぞれ形成してある。[Means for achieving the object] In order to achieve the above object, the printed circuit board of the present invention has a two-layer coating consisting of silver plating and high-purity gold plating covering the wire bonding part of the circuit pattern. It is formed, and the silver plating is 2
~4μm thick, high purity gold plating is 0.2~0.3μm
They are each formed to a thickness of .
［実施例］
第１図において、基板１にはICワイヤボンデ
イング部３、接点部４，５、部品実装パツド部６
および引回し配線部分７からなる回路パターンか
ら形成されている。ワイヤボンデイング部３、接
点部４，５、部品実装パツド部６上には銀メツキ
８が２〜4μｍの厚さで形成してあり、その上に
更に高純度金メツキ（通称「ソフト金メツキ」）
９が0.2〜0.3μｍの厚さで被覆して形成されてい
る。基板１の金メツキをほどこした部分以外の部
分はレジスト１０で被覆されている。したがつて
引回し配線部分７はこのレジスト１０で被覆され
ている。[Example] In FIG. 1, a board 1 includes an IC wire bonding section 3, contact sections 4 and 5, and a component mounting pad section 6.
and a circuit pattern consisting of a routing wiring portion 7. Silver plating 8 with a thickness of 2 to 4 μm is formed on the wire bonding part 3, contact parts 4 and 5, and component mounting pad part 6, and on top of that, high-purity gold plating (commonly known as "soft gold plating") is formed. )
9 is coated with a thickness of 0.2 to 0.3 μm. The parts of the substrate 1 other than the gold-plated parts are covered with a resist 10. Therefore, the routing wiring portion 7 is covered with this resist 10.
つぎに第２図を参照して製造工程を詳細に説明
する。 Next, the manufacturing process will be explained in detail with reference to FIG.
基板１には、銅のエツチングパターン１１が形
成され、この上にレジスト１０がパターン形成さ
れる。ワイヤボンデイング部３、接点部４，５、
部品実装パツド部６の端子部分は銅のエツチング
パターン１１が露出しており、その上にワイヤボ
ンデイングのための所要の硬度を持たせるために
下地ニツケルメツキ１２が設けられる。 A copper etching pattern 11 is formed on the substrate 1, and a resist 10 is patterned thereon. Wire bonding part 3, contact parts 4, 5,
A copper etching pattern 11 is exposed at the terminal portion of the component mounting pad portion 6, and a base nickel plating 12 is provided thereon to provide the required hardness for wire bonding.
この下地ニツケルメツキ１２の上には、銀メツ
キ８が２〜4μｍの厚さで形成される。下地ニツ
ケルメツキ１２の上に形成される被膜の特性とし
ては、所要の柔軟性や塑性流動性が要求される
が、従来は金単体でそれに対応していたが、この
考案では金とほぼ同等の塑性流動性を有する銀を
使用している。銀の場合は、金よりも若干厚めに
２〜4μｍ厚に形成することが必要であるが、そ
れでもコスト的には金よりも格段に安く済む。 On this base nickel plating 12, a silver plating 8 is formed to a thickness of 2 to 4 μm. The properties of the film formed on the base nickel plating 12 require a certain degree of flexibility and plastic fluidity, and conventionally this was achieved by using pure gold, but with this invention, it has a plasticity that is almost equivalent to that of gold. It uses liquid silver. In the case of silver, it is necessary to form it to a thickness of 2 to 4 μm, which is slightly thicker than gold, but the cost is still much lower than that of gold.
しかし、銀が直に露出していると、銀の表面に
マイグレーシヨンが発生したり、表面が硫化また
は酸化して導通の信頼性が低下するので、それを
防止しかつ金ワイヤとの密着性を確保するため
に、さらにこの金メツキ８の上に高純度金メツキ
９を形成している。この高純度金メツキ９は、単
に銀のマイグレーシヨンや硫化または酸化を防止
する目的のものであるから、0.2〜0.3μｍという
非常に薄い膜で十分である。 However, if silver is directly exposed, migration occurs on the silver surface, and the surface becomes sulfurized or oxidized, reducing the reliability of conduction. In order to ensure this, high-purity gold plating 9 is further formed on top of this gold plating 8. Since this high-purity gold plating 9 is simply for the purpose of preventing silver migration, sulfurization, or oxidation, a very thin film of 0.2 to 0.3 μm is sufficient.
この構成によれば、金の使用量は少ないが、高
純度金メツキを1μｍ以上形成した従来のものと
ほぼ同等のボンデイング成功率99.9％が得られ、
ICなどのマルチワイヤボンデイングに十分に対
応できることが実験により確認された。 According to this configuration, although the amount of gold used is small, it is possible to obtain a bonding success rate of 99.9%, which is almost the same as the conventional method in which high-purity gold plating is formed with a thickness of 1 μm or more.
Experiments have confirmed that it is fully compatible with multi-wire bonding for ICs, etc.
［考案の効果］
以上のように、本考案のプリント基板によれ
ば、従来の高純度金メツキ1μｍの高信頼性仕様
の場合と同等のボンデイング成功率を低コストの
構成で実現できるという実用上誠に著大な効果を
発揮する。[Effects of the invention] As described above, the printed circuit board of the invention has practical advantages in that it can achieve the same bonding success rate as the conventional high-reliability specification of 1 μm high-purity gold plating with a low-cost configuration. It really has a great effect.
第１図は平面図、第２図は断面説明図である。
１……基板、３……ワイヤボンデイング部、８
……銀メツキ、９……高純度金メツキ。
FIG. 1 is a plan view, and FIG. 2 is an explanatory cross-sectional view. 1... Board, 3... Wire bonding part, 8
...Silver plating, 9...High purity gold plating.
Claims (1)
4μｍの厚さの銀メツキとそれを被覆する0.2〜
0.3μｍの厚さの高純度金メツキとからなる２層被
膜を形成したことを特徴とするプリント基板。 At the wire bonding part of the circuit pattern,
4μm thick silver plating and 0.2~ to cover it
A printed circuit board characterized by forming a two-layer coating consisting of high-purity gold plating with a thickness of 0.3 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5902484U JPS60172360U (en) | 1984-04-20 | 1984-04-20 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5902484U JPS60172360U (en) | 1984-04-20 | 1984-04-20 | Printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60172360U JPS60172360U (en) | 1985-11-15 |
| JPH0236278Y2 true JPH0236278Y2 (en) | 1990-10-03 |
Family
ID=30585064
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5902484U Granted JPS60172360U (en) | 1984-04-20 | 1984-04-20 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60172360U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011102040A1 (en) | 2010-02-19 | 2011-08-25 | 旭硝子株式会社 | Substrate for mounting element, and method for manufacturing the substrate |
| WO2011138949A1 (en) | 2010-05-07 | 2011-11-10 | 旭硝子株式会社 | Substrate on which element is to be mounted, and process for production thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4879253U (en) * | 1971-12-29 | 1973-09-28 | ||
| JPS6138187Y2 (en) * | 1981-04-07 | 1986-11-05 |
-
1984
- 1984-04-20 JP JP5902484U patent/JPS60172360U/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011102040A1 (en) | 2010-02-19 | 2011-08-25 | 旭硝子株式会社 | Substrate for mounting element, and method for manufacturing the substrate |
| WO2011138949A1 (en) | 2010-05-07 | 2011-11-10 | 旭硝子株式会社 | Substrate on which element is to be mounted, and process for production thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60172360U (en) | 1985-11-15 |
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