JPH02285427A - Information processor - Google Patents

Abstract

PURPOSE:To prevent the throughput from decreasing by starting a machine check when error occurrence is detected in access to the instruction part of a storage part and performing exceptional processing when error occurrence is detected in access to the operand part of the storage part. CONSTITUTION:If an AND gate 13 decides that an error occurs in instruction fetching operation when the error is detected during access from an access control part 11 to the storage device 2, a machine check F/F 15 is set and the machine checking operation is started. Then, when an AND gate 12 decides that the error occurs in operand fetching operation, an exception F/F 14 is set and the exceptional processing is performed. Therefore, even if an error occurs during the access to the operand part, the device is not shut down and the processing can be carried on by retrial by an exceptional processing program. Consequently, the throughput is prevented from decreasing.

Description

TECHNICAL FIELD The present invention relates to an information processing device, and more particularly to a method for handling errors that occur when an information processing device accesses a storage device in which instruction and operand portions of software for controlling operations are stored. .

Conventional technology Conventionally, in this type of error handling method, when an error is detected while an information processing device is accessing a storage device, the current software is automatically updated under the control of the information processing device's hardware or firmware. The process was interrupted and shifted to machine check.

A machine check is a condition in which the information processing equipment itself detects that the process cannot continue to operate.
When the hardware or firmware of an information processing device detects an access error to a storage device when executing an instruction or accessing an operand, it automatically determines that there is a failure and shuts down the device itself.

In such conventional error handling methods, when an error is detected when accessing the storage device of an information processing device, the current software processing is automatically interrupted under the control of the information processing device's hardware or firmware. Since the system was shifted to a machine check, the information processing device itself would go down, resulting in a reduction in processing efficiency.

OBJECTS OF THE INVENTION The present invention has been made to eliminate the drawbacks of the conventional methods as described above, and even if an error occurs when accessing an operand, processing can be continued without bringing down the device itself. An object of the present invention is to provide an information processing device that can prevent a decrease in processing efficiency.

Composition of the Invention An information processing device according to the present invention is an information processing device that accesses a storage device in which an instruction section and an operand section of software that performs operation control are stored, and the information processing device is an information processing device that accesses a storage device in which an instruction section and an operand section of software that performs operation control are stored. a detecting means for detecting the error detected by the detecting means; a determining means for determining whether the error detected by the detecting means is an error when accessing the instruction section or an error when accessing the operand section; The method includes means for proceeding to a machine check when it is determined that there is an error in accessing the instruction section, and means for performing exception handling when the determining means determines that there is an error in accessing the operand section. It is characterized by

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, an access control unit 11 of an information processing device 1
accesses the storage device 2 via the bus 100, and detects whether an error has occurred during this access. When the access control unit 11 detects the occurrence of an error, it sends a storage device access error signal (hereinafter referred to as an error signal) 10
1 is output to AND gates 12 and 13.

The storage device 2 stores an instruction section and an operand section of 2 software that performs operation control, and when accessing the instruction section, an instruction fetch signal 102 is output from the access control section 11 to the AND gate 13, When accessing, the AND gate 1 is sent from the access control unit 11.
2, an operand fetch signal 103 is output.

The AND gate 12 performs a logical product of the error signal 101 from the access control unit 11 and the operand fetch signal 103, and outputs the result to the exception flip-flop (hereinafter referred to as exception F/F) 14.

The AND gate 13 takes the AND of the error signal 101 from the access control unit 11 and the instruction fetch signal 102,
The calculation result is output to a machine check flip-flop (hereinafter referred to as machine check F/F) 15.

Therefore, if an error is detected while the access control unit 11 is accessing the instruction section of the storage device 2, the error signal 101 and the instruction fetch signal 102 both become 1°, so that the AND gate 13 The instruction fetch error signal 105 to the machine check F/F 15 becomes "1", and the machine check F/F 15 is set.

When the machine check signal 107 from the machine check F/F 15 becomes "1", the execution processing unit 16 shifts to a machine check, and the information processing device 1 goes down.

Further, if an error is detected while the access control unit 11 is accessing the operand section of the storage device 2, the error signal 101 and the operand fetch signal 103
Since both become "1", the operand fetch error signal 104 is sent from the AND gate 12 to the exception F/F 14.
becomes "1" and the exception F/F 14 is set.

The execution processing unit 16 receives the exception signal 10B from the exception F/F 14.
When becomes "1", the software shifts to the exception handling program, which performs processing such as retrying the operand part and tries to restart the process, so that the information processing device 1 does not go down. ,
The process continues.

In this way, when an error is detected when the access control unit 11 accesses the storage device 2, the AND gate 1
3, if the error is determined to be an error during instruction fetch, the machine check F/F 15 is set and the process moves to machine check, and if the AND gate 12 determines that the error is an error during operand fetch, an exception is generated. By setting the F/F14 to shift to exception handling, even if an error occurs when accessing the operand section, the device itself will not go down, and the exception handling program will perform retries and continue processing. can do.

Therefore, even if an error is detected when accessing the operand section, it is possible to avoid the information processing device 1 from going down outside of software control, and thus it is possible to prevent a decrease in processing efficiency.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, when the occurrence of an error is detected in the access to the instruction section of the storage device, a machine check is performed, and the occurrence of an error in the access to the operand section of the storage device is detected. By performing exception handling when an error is detected, even if an error occurs when accessing the operand section, processing can be continued without bringing down the device itself, preventing a drop in processing efficiency. The effect is that it can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Explanation of symbols of main parts 1...Information processing device 2...Storage device 11...Access control unit 12.13...And gate 14... ...Exception flip-flop 15...
・Machine check flip-flop 16...Execution processing section

Claims (1)

[Claims] (1) An information processing device that accesses a storage device in which an instruction section and an operand section of software that performs operation control are stored, the detection means detecting the occurrence of an error in accessing the storage device; determining means for determining whether the error detected by the detecting means is an error in accessing the instruction section or an error in accessing the operand section; and an error in accessing the instruction section by the determining means. An information processing apparatus comprising: means for proceeding to a machine check when it is determined that the operand part is accessed; and means for performing exception processing when the determining means determines that there is an error in accessing the operand section.