JPH02310753A - Microprogram controller - Google Patents

Abstract

PURPOSE:To suppress the inhibit rate of microprogram control and to accelerate processing speed by writing correction data in the occurrence of a one-bit error when no microinstruction is read out from a control storage. CONSTITUTION:The microinstruction in the control storage 100 is read out, and is stored in a data register 120, and simultaneously, the output of an address register 150 is stored in an address register 160. One-bit error correction is performed on the output of the data register 120 at an EDAC circuit 130, and it is stored in a data register 140, and simultaneously, it is stored in the data register 120 via a selector 110, and the detection of the one-bit error is informed to an idle routine execution detecting part 170. If the execution of an idle routine is detected at that time, the correction data stored in the data register 140 is written on the control storage 100 with an address outputted from the address registor 160. In such a way, the microprogram control can be prevented from being inhibited.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram control device, and more particularly to a method for writing microinstructions corrected at the time of one bit error in a microinstruction into a control memory.

[Conventional technology]

Conventionally, in this type of microprogram control device, when a 1-bit error occurs in read data, it takes at least two cycles for the error correction circuit to correct the data and write it into the control memory, during which time microprogram control is inhibited. was.

FIG. 2 is a diagram for explaining control of a conventional microprogram control device. In this conventional example, a microinstruction is read out from a control memory 900 in which a microprogram is stored, and is sent to a data register 920 via a selector 910. Store in. The output of this data register 910 is processed using a 1-bit error correction and 2-bit error detection function (EDA).
This is called the C function. Regarding the EDAC function, please refer to the known document 1983-20367 rError Detection and Correction System J.
It is described in detail in IBM and "Coding Theory" co-authored by Takashi Tokura and Inagaki, published by Corona Publishing. ) An error check is performed by the circuit 930, and if a 1-bit error occurs, an inhibition signal is sent to the controlled section.

The microinstruction corrected by the EDAC circuit 930 is
It is stored in data register 920 and written to control memory 900. After the writing of the control memory 900 is completed, the inhibition signal is released and control by microinstructions is performed.

[Problem to be solved by the invention]

In the conventional microprogram control device described above, when writing a microinstruction with a 1-bit error corrected into the control memory, the microprogram control is inhibited during that time, so the next microinstruction cannot be read out from the control memory and executed. The disadvantage is that it is not possible.

[Means to solve the problem]

The configuration of the microprogram control device of the present invention includes a control memory in which microinstructions are stored, and a microprogram control device that corrects and executes the microinstruction when there is a 1-bit error in the microinstruction read from the control memory. a first means for storing the corrected microinstruction; a second means for storing the address of the microinstruction in which the one-bit error has occurred; and third means for detecting, and writes the corrected microprogram in the first means according to the result of the third means to an address of the control storage indicated by the second means. do.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a diagram for explaining control of a microprogram control device according to an embodiment of the present invention.

100 is a control memory in which microinstructions are stored; 12
0 is the microinstruction and ED read from the control memory 100
a data register 130 that selects and stores 1-bit error correction data from the AC circuit 130 using the selector 110;
is an ED that performs 1-bit error correction and 2-bit error detection.
AC circuit; 140 is a data register 15 that stores data that has undergone 1-bit error correction in the EDAC circuit 130;
0 is an address register that stores the read address of the control memory 100, 160 is an address register that stores the address sent from the address register 150, 17
0 is an idle routine execution detection unit that detects whether a microinstruction is executing an idle routine and controls writing to the control storage unit 100;
The output of 0 is sent to the controlled unit by the control signal line a, and is also sent to the EDAC circuit 130, and is also sent to the data register 1.
The output of 40 is sent to control store 100.

Next, the operation of this embodiment having the above configuration will be explained.

Here, it is assumed that a 1-bit error in the control memory 100 has never occurred.

The microinstruction in the control memory 100 specified by the address output from the address register 150 is read out and stored in the data register 120 via the selector 110. At the same time, the output of address register 150 is stored in address register 160.

Next, the output of the data register 120 is sent to the controlled section through the control signal line a, and is controlled by the microprogram. At the same time, the output of the data register 120 is sent to the EDAC circuit 130 to perform error detection.
When a 1-bit error is detected, 1-bit error correction is performed and the corrected data is stored in the data register 140.

At the same time, the corrected data is stored in the data register 120 via the selector 110. At the same time, the detection of a 1-bit error is reported to the idle routine execution detection unit 170. At that time, the idle routine execution detection unit 17
0 detects the execution of an idle routine, the correction data stored in the data register 140 is stored in the control memory 1 at the address output from the address register 160.
Write to 00.

〔Effect of the invention〕

As explained above, the present invention is capable of correcting microprogram control that occurs temporarily when a 1-bit error occurs by writing temporary correction data for a 1-bit error into a control memory when no microinstructions are read from the control memory. This has the effect of lowering the inhibition rate and increasing processing speed.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional microprogram control device.

100... Control memory, 110... Selector, 120
...Data register, 130...EDAC circuit, 1
40...Data register, 150...Address register, 160...Address register, 170...Idle routine execution detection unit.

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Claims (1)

[Claims] When a control memory in which a microinstruction is stored and a microinstruction read from this control memory have a 1-bit error, the corrected microinstruction is stored in a microprogram control device that executes the microinstruction after correction. a first means, a second means for storing an address of the microinstruction in which the 1-bit error has occurred, and a third means for detecting that the microinstruction is executing an idle routine; A microprogram control device characterized in that the corrected microprogram in the first means is written in the control storage at an address indicated by the second means in accordance with the result of the third means.