JPH0224271Y2 - - Google Patents

Description

[Detailed explanation of the idea] The present invention relates to a charging/discharging circuit.

A charging/discharging circuit that charges or discharges a capacitor uses the fluctuation in its potential to function as a variable voltage source for an automatic gain control circuit, or to operate a comparator at an appropriate level during charging or discharging to obtain pulses, etc. used. Further, there are cases where it is desired to select the charging/discharging state of the charging/discharging circuit or to arbitrarily set the charging/discharging time based on the control signal, or when accuracy of the charging/discharging time is required.

The purpose of the charging/discharging circuit of the present invention is to provide a charging/discharging circuit in which the charging time and discharging time of a capacitor can be arbitrarily set using a control signal.

Another object of the present invention is to provide a charging/discharging circuit that can appropriately set the charging/discharging time.

Furthermore, another object is to provide a discharge circuit suitable for low power supply voltages.

Hereinafter, the charging/discharging circuit of the present invention will be explained based on the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the charging/discharging circuit according to the present invention, in which 1 is an input terminal into which a pulse-like control signal for selecting charging/discharging is input, and 2 is an output terminal that obtains an output by charging/discharging. It is an output terminal. C is a capacitor, and charging current I ₀ is a transistor T5, T
8 and the discharge current I ₁ flows through transistor T4 and resistor R3. The charging transistor T5 and the transistor T6 form a constant current source circuit biased by a bias circuit 3 consisting of a diode-connected transistor T7 and a resistor R1. Therefore, a current equal to the current I ₀ flowing through the resistor R1 flows through the transistors T5 and T.
6 as collector current _I0 . During charging, a high potential pulse of a pulse signal is input to input terminal 1, and transistors T1 and T2, which have a common base and are connected to input terminal 1, are turned on.
The transistor T8 is biased by a bias circuit 5 consisting of a diode-connected transistor T9 and a resistor R2, so that a collector current I ₀ can flow to the capacitor C. On the other hand, the collector current I ₀ flowing out from the transistor T6 is drawn into the transistor T1, and the transistor T3 is cut off, so that the transistor T4 is turned off. Therefore, the discharge current I ₁ does not flow out via the transistor T4. Next, a low potential pulse signal is input to the input terminal 1, and the transistor T1,
When T2 is turned off, the bias circuit 5 of the transistor T8 is cut off, and the charging current _I0 is transferred to the transistor T8.
It cannot flow through 8. On the other hand, transistor T1
is off, collector current I ₀ flows into diode-connected transistor T3 forming bias circuit 4, transistor T4 is biased and draws a discharge current I ₁ approximately equal to collector current I ₀ from capacitor C. . transistor T5,
T6 and T7 form a current mirror circuit, and transistors T3 and T4 are formed from a constant current source circuit or a current mirror circuit. By forming a current mirror circuit, a current equal to the collector current I ₀ flowing through the diode-connected transistor T3 can flow through the transistor T4, so that the current charging current I ₀ and the current discharging current I ₁ can be set to substantially equal values. FIG. 2 shows the output waveform of the output terminal 2 of the charging/discharging circuit, and shows the case where the charging time t1 and the discharging time t2 are substantially equal.

Further, FIG. 3 is different from the charging/discharging circuit of FIG. 1 in that the emitter area of transistor T4 is set twice, but otherwise is the same. Transistor T4
Since the emitter area is twice as large, the discharge current I ₁ is twice as large. Therefore, as shown in the output waveform shown in FIG. 4, the discharging time t3 is half of the charging time t1.

The charging/discharging circuit according to the present invention includes a transistor T5,
It is formed from a current mirror circuit which is also a constant current source circuit consisting of T6 and T7, and a current having a value equal to the current _I0 flowing through the resistor R1 of the bias stage of the current mirror circuit flows through the transistors T5 and T6 as a mirror current. Therefore, according to the charging/discharging circuit of the present invention, the charging time t1 and the discharging time t2 can be set equally. Further, the charging current I ₀ can be freely set by changing the resistance value of the resistor R1. or,
The discharge current I ₀ can also be easily set using the resistor R3. Furthermore, as shown in FIG.
It has the advantage that the charging current I ₀ can be arbitrarily and easily set by changing the emitter area. In addition, it has the feature that charging and discharging currents can be set with extremely high accuracy.

Furthermore, the charging/discharging circuit of the present invention performs charging and discharging in synchronization with the pulse of the control signal supplied to the input terminal 1, and the maximum potential of the charging voltage of the capacitor C is adjusted by keeping the pulse width at a high level for a period of time. If it is narrower than t1, the maximum charging potential will decrease. If the pulse width of the control signal is made wider than the period t1, the maximum charging potential can be maintained and a trapezoidal waveform output wave can be produced, and the pulse width of the control signal supplied to the input terminal 1 can be adjusted. This has the advantage that various output waveforms can be obtained.

Of course, the charging/discharging circuit of the present invention, except for the capacitor C, can be easily incorporated into a semiconductor integrated circuit. Also,
If a more accurate bias stage of the current mirror circuit is used, the accuracy of the charging/discharging time becomes even higher.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a charging/discharging circuit according to the present invention, and FIG. 2 is a waveform diagram showing its output waveform. FIG. 3 is a circuit diagram showing another embodiment of the charging/discharging circuit according to the present invention, and FIG. 4 is a waveform diagram showing its output waveform. T1 to T9...transistor, C...capacitor, R1, R2, R3...resistance.

Claims (1)

[Scope of utility model registration request] a constant current source circuit consisting of a first and second transistor biased by a first bias circuit;
a second bias circuit to which a constant current is supplied from the first transistor; a third transistor biased by the second bias circuit; and a third transistor connected between the second transistor and the third transistor. a fourth transistor, a third bias circuit that biases the fourth transistor, a capacitor connected to a connection point between commonly connected collectors of the third transistor and the fourth transistor;
a fifth transistor for controlling the second bias circuit; and a sixth transistor having common bases of the fifth transistor and controlling the third bias circuit; A charge/discharge circuit characterized in that a control signal is applied to a connection point where the bases of transistors are commonly connected, and a triangular wave synchronized with the control signal is obtained from the voltage between the terminals of the capacitor.