JPH063449Y2 - Trapezoidal wave generator - Google Patents

Description

[Detailed Description of the Invention] [Industrial application] The present invention relates to a trapezoidal wave generation circuit that uses fluctuations in the voltage between the terminals of a capacitor, and it is possible to obtain a Good rise of
A trapezoidal wave-like variable voltage having a falling characteristic is obtained.

[Conventional technology]

FIG. 4 shows a conventional trapezoidal wave generation circuit, which is configured by a combination of a bootstrap circuit for obtaining a rising waveform and a Miller integrating circuit for obtaining a falling waveform.

A bootstrap circuit for obtaining the rising waveform of the output waveform will be described with reference to FIG. Transistor Q
_{When 10} is on, the transistor Q ₁₁ is off,
A capacitor C via a diode D ₁₀ and a resistor R _11.
A charging current is supplied to ₁₀ . When the charging voltage of the capacitor _{C 10} exceeds the turn-on voltage of the transistor _{Q 12,} the transistor _{Q 12} is turned on, the voltage between the terminals of the resistor _{R 13} increases. The voltage across the resistor R ₁₃ is fed back via the capacitor C ₁₁ to reversely charge the capacitor C ₁₀ and the capacitor C ₁₁ is charged until the base and emitter voltages of the transistor Q ₁₂ become equal, and the output terminal 1
The rising waveform is obtained from.

Next, a Miller integrating circuit that forms a falling waveform will be described. When the transistor Q ₁₀ is turned off, the transistor Q ₁₁ is turned on, the capacitor C ₁₀ is charged through the resistor R ₁₀ , and the base voltage of the transistor Q ₁₂ drops. To do. Therefore, the voltage between the terminals of the resistor R ₁₃ drops, and a falling waveform is obtained from the output terminal 1.

[Problems to be solved by the device]

In the conventional trapezoidal wave generation circuit, a diode D ₁₀ is connected in order to improve the linearity of the rising slope and the falling slope of the output waveform. When the power supply voltage V _cc is relatively high, such as about 10 V, this is not a problem, but the power supply voltage V _{cc
When cc} is around 2 V, the forward voltage V _F of the diode D ₁₀ is about 0.7 V, so that a voltage loss occurs and the maximum charging voltage is about 1.3 V. Also, there is a disadvantage that timing deviation occurs since the rise time is also the first time charging is started the output waveform across the base-emitter voltage (approximately 0.7 volts) of the transistor Q ₁₀ rises. In addition, there is a drawback that the range of voltage fluctuations that can be used is extremely narrow at 0.7 to 1.3 volts.

A main object of the present invention is to provide a trapezoidal wave generation circuit capable of obtaining rising and falling waveforms with good timing accuracy.

Another object of the present invention is to provide a trapezoidal wave generation circuit that can be used with a low voltage source of several volts.

[Means for solving the problem]

The trapezoidal wave generation circuit of the present invention includes a capacitor, a bias circuit, first and second transistors biased by the bias circuit, and a current flowing through the first transistor. And a second current mirror circuit including a first current mirror circuit that outputs a current and a third transistor that applies a current to the second transistor and supplies a current having a value equal to the current to the capacitor as a charging current. And a third current including a fourth transistor that draws the current from the second current mirror circuit and the charge stored in the capacitor as a discharge current by being supplied with the current from the first current mirror circuit. Mirror circuit and electronic contact for controlling current supply from the first current mirror circuit to the third current mirror circuit The capacitor is connected between the common connection point of the collectors of the third and fourth transistors and the ground terminal, and the emitter area of the fourth transistor is set to double the emitter area of the third transistor. Then, a variable voltage is obtained from between the terminals of the capacitor.

[Action]

The trapezoidal wave generation circuit according to the present invention supplies the charging current to the capacitor and discharges the charging charge through the current mirror circuit, so that the voltage between the terminals of the capacitor is highly precise and linear. It rises or falls with good performance, and uses the rise and fall of this inter-terminal voltage as a variable voltage.

〔Example〕

The trapezoidal wave generating circuit of the present invention will be described with reference to FIG.

In FIG. 1, 1 is an output terminal for outputting a variable voltage,
2 is a power supply terminal and 3 is a ground terminal. 4 is capacitor C
A switch for controlling the charging or discharging of the device, 5 is a bias circuit composed of a constant voltage source, and 6 to 8 are current mirror circuits.

The capacitor C includes a transistor Q1 of the current mirror circuit 7 and a transistor Q2 of the current mirror circuit 8.
Commonly connected collector (output terminal 1) and ground terminal 3
Is connected in between. The current mirror circuit 7 is composed of a diode D1 and a transistor Q1 biased by the diode D1, and the current mirror circuit 8 is composed of a diode D2 and a transistor Q2 biased thereby. On the other hand, the anode of the diode D4 of the bias circuit 5 is connected to the bases of the transistors Q4 and Q3, the emitters of these transistors are connected to the resistors R1 and R2, and the other ends thereof are grounded. The collector of the transistor Q3 is
It is connected to the connection point between the cathode of the diode D1 of the current mirror circuit 7 and the base of the transistor Q1. The collector of the transistor Q4 is a diode D
The diode D3 and the transistor Q5 biased by the diode, which is connected to the connection point between the cathode of No. 3 and the base of the transistor Q5, form a current mirror circuit 6. The emitter areas of the transistors Q1 and Q2 included in the current mirror circuits 7 and 8 are set to be approximately double that of the transistor Q1.

Next, the operation will be described based on the embodiment shown in FIG. When the power supply voltage V _cc is applied, a constant voltage is applied from the bias circuit 5 to the bases of the transistors Q3 and Q4, and the resistor R
The constant currents set by 1 and R2 are drawn as collector currents from the current mirror circuits 6 and 7 to the transistors Q4 and Q3, respectively, and the transistors Q5 and Q1 at the output stage of the current mirror circuits 6 and 7 are turned on. Currents I _O and I _C flow therethrough.

Before the power supply voltage V _cc is applied, the capacitor C is in a discharged state, and when the switch 4 is turned on, the output current I _O from the current mirror circuit 6 does not flow to the current mirror circuit 8, In order to flow into switch 4,
The current mirror circuit 8 is cut off. Therefore, the output current I _C flows into the capacitor C as a charging current via the current mirror circuit 7. The potential of the output terminal 1 is charged and the saturation voltage V of the transistor Q1 is changed from 0 volt.
_{CE (SAT)} (about 0.2V) is subtracted ( _Vcc- V
_{CE (SAT)} ). If the state of the switch 4 is kept on, the potential of the output terminal 1 is kept.

Next, when the switch 4 is turned off, the current I _O flows from the current mirror circuit 6 into the current mirror circuit 8, and the discharge current I _d from the capacitor C is drawn into the transistor Q2 of the current mirror circuit 8. at the same time,
The charging current I _C from the current mirror circuit 7
It is drawn into the transistor Q2 of the mirror circuit 8. Therefore, since the current of (I _c + I _d ) is drawn into the transistor Q2, the charge charged in the collector C is discharged, and the potential of the terminal voltage (V _cc -V _{CE (SAT)} ) gradually decreases. Drop to about 0.2 volts.

The emitter areas of the current mirror circuits 6 and 7 are set equal to each other, and the emitter area of the transistor Q2 of the current mirror circuit 8 is set to approximately twice that of the transistors Q1 and Q5. Therefore, when the switch 4 is in the OFF state, a current having a value of (I _c + I _d ) can be drawn as the collector current of the transistor 1 Q2, and the charging current I _c and the discharging current I _d to the capacitor C are substantially reduced. It becomes equal value. Further, the charging time or the discharging time can be changed by changing the emitter area ratio of the transistors Q1 and Q2, and the charging / discharging currents I _c and I _d can be changed by changing the resistance values of the resistors R1 and R2. You can adjust the value.

By controlling the current I _c to be supplied to the current mirror circuit 8 by thus controlling the on-off switch 1, the output of the trapezoidal wave is obtained from the output terminal 1.

The circuit diagram of FIG. 2 is a reference diagram for explaining the adjustment of the amplitude of the output voltage of the trapezoidal wave generating circuit of the present invention. In the figure, a current mirror circuit 6 including a diode D3 and a transistor Q5 has a constant current source circuit 1 at a connection point between the cathode of the diode D3 and the base of the transistor Q5.
1 is connected and a constant current is output from the transistor Q5. The voltage source 9 supplies a voltage to the current mirror circuit 7, and the voltage source 9 is composed of a diode whose cathode is connected to the constant current source circuit 13 and a series resistor connected in parallel to the diode. from the connection point of the series resistance of the voltage source 9 voltage (V _cc -E ₁₎ it is applied. The voltage source 10 is composed of a diode whose anode is connected to the constant current source circuit 14 and a series resistor connected in parallel to the diode. The current mirror circuit 8 is connected to the connection point of the series resistor of the voltage source 10. It is grounded and the voltage of this voltage source 10 is E ₂ . The voltages E ₁ and E ₂ generated between the terminals of these resistors are the divided voltage of about 0.7 volt which is the forward voltage of the diode, and the amplitude of the output voltage is adjusted by changing the voltage dividing ratio. It is possible.

If described in voltage waveform diagram of FIG. 3, the variable is the range of the voltage obtained from the output terminal 1 of the trapezoidal wave generating circuit of Figure 2 is being charged capacitor C from the voltage E ₂ (V _cc -
It is the range until the potential of E ₁ ) is reached. The output obtained from the output terminal 1 has a rising time T ₁ of the output waveform from E ₂ to reach (V _cc −E ₁ )
by fall time _{T 2} is discharged from the _cc -E ₁₎ up to _{E 2.}

〔effect〕

The trapezoidal wave generation circuit of the present invention allows a constant current output current to flow into a capacitor through a current mirror circuit,
Alternatively, since a variable voltage is obtained from between the terminals of the capacitor by pulling in, the linearity and timing of the rising and falling waveforms of the output voltage can be precisely determined, and the accuracy of the charging / discharging time T ₁ , T ₂ can be improved. Has a very good advantage.

Further, the trapezoidal wave generating circuit of the present invention has a large variable range of the output voltage, and therefore has an advantage that a sufficient variable voltage range can be set even with a low voltage power source of about 2 volts.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a trapezoidal wave generating circuit according to the present invention, FIG. 2 is a reference diagram of the trapezoidal wave generating circuit of the present invention, and FIG. 3 is for explaining FIG. FIG. 4 is a circuit diagram showing an example of a conventional trapezoidal wave generation circuit. 1: Output terminal, 2: Power supply terminal, 3: Ground terminal, 4: Switch, 5: Bias circuit, 6, 7, 8, Current mirror circuit, 9, 10: Voltage source, 11-14: Constant current source Circuit I _d : charge current, I _c : discharge current

Claims (1)

[Scope of utility model registration request] 1. A capacitor, a bias circuit, first and second transistors biased by the bias circuit, and a first current which flows into the first transistor and outputs a current having a value equal to the current. Current mirror circuit, and a second current mirror circuit including a third transistor for feeding a current into the second transistor and supplying a current having a value equal to the current to the capacitor as a charging current; A third current mirror circuit including a current supplied from the third transistor and a fourth transistor that draws in the charge charged in the capacitor as a discharge current by supplying the current from the current mirror circuit; An electronic contact for controlling a current supplied from the current mirror circuit to the third current mirror circuit, And the capacitor is connected between the common connection point of the collectors of the fourth and fourth transistors and the ground terminal, and the emitter area of the fourth transistor is set to approximately twice the emitter area of the third transistor. A trapezoidal wave generation circuit characterized by obtaining a variable voltage from between the terminals of a capacitor.