JPH0223635A - Semiconductor integrated circuit and broadcasting radio receiver using same - Google Patents

Abstract

PURPOSE:To prevent interference and realize IC in such a way that even FM front end circuits are integrated in one chip by surrounding the FM front end circuits with a dummy island. CONSTITUTION:The whole block of FM front end circuits 1 where frequencies are converted into intermediate frequency signals is surrounded completely with a dummy island 23 by causing RF signals and local oscillation frequency signals to mix in a mixing circuit 3 and only a housing region 24 of a local oscillation circuit 2 is partitioned further by a dummy island 23a. An exclusive grounding electrode pad 19a formation region which supplies grounding potential GND to a circuit element of the local oscillation circuit 2 is also housed in the dummy island 23a surrounding the local oscillation circuit 2 and grounding potential is supplied to a substrate through an isolation region. The dummy island 23 is surrounded by a highly concentrated isolation region connecting to the substrate and is a region which is isolated electrically from others. As a result, the dummy island 23 becomes to be in a floating state where no power source potential Vcc or any other potential is impressed.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a semiconductor integrated circuit in which circuit blocks such as an FM/AM tuner having different signal frequencies and signal levels are formed on the same semiconductor substrate.

(b) Conventional technology Electronic devices such as TV tuners and FM/AM tuners are
Since the audio signal is extracted from the F (Radio Frequency) signal, the frequency of the signal handled by each circuit block divided by function is often different. For example, an FM tuner for Japan only has an RF signal of 76 to 9
0MHz, the intermediate frequency signal is 10.7MHz, and 2
Audio signals from 0 to 20,000Hz and 20Hz to 9
A wide range of signals of 0 MHz will be handled.

An example of the above FM/AM tuner is shown in FIG. In the figure, (1) selects an FM broadcast and mixes the received frequency signal with the oscillation frequency signal of the local oscillation circuit (2).
3) is an FM front-end circuit that converts the frequency into an intermediate frequency by mixing the intermediate frequency signal (I
FM-IF amplification circuit that amplifies and limits the amplitude of the F-fold signal and detects it to obtain an audio signal (AF-fold signal, (5)
) is a noise canceling circuit having a function such as that described in Japanese Patent Publication No. 62-21461, (6) is a multiplex circuit that demodulates the L channel to the R channel signal in the case of stereo broadcasting, and (7) is an AM tuner circuit that selects an AM broadcast and outputs an audio signal.

For example, in the case of FM broadcast reception, the RF multiplied signal FM is input from the antenna (8) and high-frequency amplified by the RF amplifier circuit (9).
The oscillation frequency signal output by the local oscillation circuit (2) of the front end circuit (1) and the FM front end circuit <1)
By mixing in the mixing circuit (3), the FM front end circuit (1) outputs the IF multiplied signal, and the IF multiplied signal F
By detecting the wave with the detection circuit of the M-IF amplifier circuit (4), a composite/soto signal is output from the FM-IF amplifier circuit (4), and the output terminal (
10) are configured to output L channel and R channel audio signals, respectively. Incidentally, an FM tuner circuit with such a configuration was developed in 1982, for example.
Published December 10, 1988 Sanyo Semiconductor Data Book Bipolar Integrated Circuits for Portable Audio Volume 1
It is described on page 52.

Incidentally, in recent years, electronic devices are required to be more and more compact and sophisticated, and accordingly, the circuit shown in FIG. 7 is being made into a single chip as much as possible. However, in the example of the FM tuner mentioned above, the FM front end circuit (1) is several tens of M
Since it handles high frequency signals of Hz, interference with other circuits is likely to occur due to unnecessary radiation.

Furthermore, since a weak level signal from the antenna (8) is handled, the circuit operation tends to become unstable due to interference with other circuit blocks, and in severe cases, oscillation occurs. Therefore, FM
It was extremely difficult to integrate the front end circuit (1) into a single chip.

Furthermore, electronic devices in recent years have become increasingly diverse and diverse, and it is desired to shorten pattern design time. In addition, there are various demands such as deletion, replacement, or addition of specific circuit blocks to semiconductor integrated circuits whose designs have been completed. However, since the specific circuit blocks are not necessarily accommodated within the same occupied area, the design must be redesigned for each request, which has the disadvantage that it is not possible to immediately respond to the requests.

(c) Problems to be Solved by the Invention As described above, in the past, there was a drawback that it was extremely difficult to integrate the FM front end circuit (1) because circuit interference was likely to occur. In addition, the development period for pattern design was long, and there was a drawback that it was not possible to immediately respond to various requests.

(d) Means for Solving the Problems The present invention was made in view of the above-mentioned drawbacks, and the FM front end circuit (1) is surrounded by a dummy island (23) to prevent interference with other circuits. It is something. In addition, the surface of the semiconductor chip (11) is divided into matte blocks 18) of substantially the same size, and each circuit block is accommodated in an area corresponding to an integer number of mats (18), and the FM front end circuit (1) is accommodated. In this case, this is surrounded by a dummy island (23) to prevent circuit interference and facilitate pattern design by combining mats (18).

(E) Effect According to the present invention, since there is a resistance component due to the N-type high resistance layer of the dummy island (23), and a PN resistance component due to the N-type layer of the dummy island (23) and the high concentration isolation region (30), Since the junction barrier increases the resistance component, the connection between the two separated by the dummy islands (23) can be made rough. In addition, the dummy island (23) can prevent circuit interference, so the matte (18) IC can be matted (18).
18) without impairing the effect of the FM front end circuit (
1) can be incorporated.

(f) Example Hereinafter, the present invention will be explained in detail with reference to the drawings.

First, let's talk about the mat that makes pattern design easier.
This will be explained using figures. In the figure, a semiconductor chip (1
A divided area (12) in the center of 1〉 that crosses it in a substantially straight line
The element formation region of the semiconductor chip (11) is divided into two regions of substantially the same size, upper and lower. As described later, the divided area (12) is a necessary and unavoidable area for extending the ground line (13) and the power supply line (14), and is an area in which no circuit elements are formed.
12), the two partitioned regions are defined as first and second regions (15) and (16), respectively. Then, a division line (17) is provided in which a ground line (13) and a power supply line (14) are arranged as a negative pair and extend in a direction orthogonal to the division area (12), and the division line (17) Semiconductor chips (
11) The surface of the mat is covered with a large number of mats (
18). The size of the mats (1, 8) is set to an area that can accommodate an arbitrary fixed number of elements, and its width is empirically set to a width that allows five to six NPN transistors to be arranged in one row.

On both sides of the mat (18), the ground line (13) and the power line (14), which constitute the partition line (17), are extended in pairs, so they are arranged regularly, for example, in a comb shape, facing each other. By extending the mat (1
A ground line (13) and a power supply line (14) extend on one side of the mat (8) and a power supply line (14) on the other side, respectively, to supply operating power to the circuit elements formed on the mat (18).

Ground line (13) that extends the division line (17)
and power supply lines (14) are grouped together for each circuit block and depending on whether or not they are allowed to have a common impedance, and are extended over the divided area (12) to connect to the corresponding ground electrode pad (19). ) and power supply electrode pads (
20). As a result, a plurality of ground lines (13) and power lines (14) extend over the divided area (12), and each line is formed relatively wide to reduce wiring impedance. (12) also naturally requires a relatively large area.

A ground line (13) extending the division line (17)
) and the power line <14), the ground line (13) and the power line (14) extending above the divided area (12), and the connection wiring between circuit elements in each mat (18) are arranged in a comb-shaped layout. This is basically done using the first wiring layer. From the second layer onwards, the plot line (17
) and divided areas (12) to form signal transmission wiring between mats (18) and shield electrodes (21).

In addition, the division area (12) is sometimes divided into each division line (17).
Also extend parallel to. This is V for package bin arrangement requirements. Due to the positional constraints of the C electrode pad (20) and the ground electrode pad (19), and the
8) Or, if there is a relationship that requires special separation in circuit functional blocks, it is provided between each mat (18). In Figure 3, the reason for the former is between mats D and E, and mat M
The reason for the latter is between and N. Further, a V is provided near the end of the one divided region (12a) extending in parallel. C
A voo line (14) and a ground line (13) are routed from the electrode pad (20) and ground pad (19), respectively, and then routed over the divided region (12) that crosses the center of the semiconductor chip (11). and connect to the circuit elements within each mat (18).

When storing circuit blocks according to machine characteristics in a semiconductor chip (11) in which the element forming area is divided into a large number of pins I-(18) in this manner, each circuit block is stored as follows.

First, since the mat (18) is designed to have a size that can accommodate an arbitrary fixed number of elements, the circuit block is divided into the fixed number of elements. For example, if the size of the mat (18) is for storing 100 elements and the circuit block is about 270 elements, prepare three mats (18) and store 100 elements each.
Classify using 00 elements as a guide. Of course, capacitors, etc. that occupy a large area should be taken into consideration. Then, the circuit elements are stored in each mat (18) according to the above classification, and the mat 1
Connection wiring between circuit elements such as NPN-PNPI-transistors, diodes, resistors, and capacitors housed in 8> is terminated at the first wiring layer. After repeating this and completing the pattern design for all mats (18), the three mats 1-(18) are arranged adjacently, and the wiring from the second layer onwards is used to connect each mat (18). By making electrical connections, functional circuit blocks are constructed.After storing all the circuit blocks in the mat (18), all the mats (18) are combined and the wiring for the second and subsequent layers is completed. The layers design the overall IC by making electrical connections between each circuit block.

According to this configuration, by storing a plurality of circuit blocks with different functions in an integral number of mats (18), each circuit block can be designed and the circuit block can be divided into a fixed number of elements. It becomes possible to design each mat (18). Therefore, it is possible to design each circuit block or mat (18) in parallel, and the design period can be significantly shortened. In addition, circuit changes can be made for each circuit block and for mats (18
), there is no need to change the design of the entire IC.
Other than the changed parts, it can be used while maintaining the reliability of the previous model.

Next, connect the FM/AM tuner circuit to the mat (1
The semiconductor integrated circuit housed in 8) will be explained using FIGS. 1 to 5.

First, based on Figure 3, since the FM front-end circuit (1) is composed of approximately 250 elements, three mats (18) are prepared and the entire FM front-end circuit (1) is The circuit elements are divided into 80 to 100 elements, and according to this division, the circuit elements are stored in L and M respectively on the mat, and the connection wiring in the mat (18) and the mat (18
) and the mat (18) by processing the connection wiring between the FM
Realize the functional configuration of the front end circuit (1). Similarly, other circuit blocks are stored in the mat (18), and the AM tuner circuit (7) is placed in mats A to D.
The amplifier circuit (4) is connected to mat E to mat E, the noise cancellation circuit (5) is connected to mat N to mat P, the multiplex decoder circuit (6) is connected to mat Q to mat T, and the (optional) The circuits are each housed in a mat J, and the circuits are arranged so as to fit within the rectangular shape of the semiconductor chip (11) as a whole. Then, the functional configuration of the entire IC is realized by processing connection wiring between each circuit block.

By the way, the FM front end circuit (1) is an antenna (
8), an RF multiplied signal of several tens of MHz tuned by a tuning circuit described later is input, and the RF multiplied signal local oscillation circuit (2>
It has a function of converting the frequency into an intermediate frequency (IF) signal of 10.7 MHz by mixing the local oscillation frequency signal output by the mixing circuit (3). In addition to the local oscillation circuit (2) and mixed circuit (3) being the main components, the mixed circuit (
The IF output signal of 3) is amplified and the FM/IF amplification circuit (4
) and other circuits associated with the main circuit, such as an amplifier circuit (IF-Amp) for outputting to the main circuit and an automatic gain control circuit (AGC) for automatically controlling the received signal level. There are many. These circuits handle high frequency signals of several tens of MHz and several microvolts (μ
(2) Because it must accurately process signals ranging from minute levels to relatively large amplitude levels, this circuit dislikes interference with other circuit blocks. Among these, the local oscillation circuit (2) is the circuit that requires the most attention because it must accurately perform the extremely unstable operation of high-frequency oscillation. On the other hand, among other circuit blocks, there is an FM-IF amplifier circuit (4
> is a circuit block whose relationship with the FM front-end circuit (1) requires the most attention because it handles signals with a relatively large amplitude level that is relatively close to 10.7 MHz.

In order to prevent the above-mentioned interference between the circuit blocks, the FM front end circuit (1) takes various measures against interference.

The first is a shield electrode (21) that covers the area where the FM front end circuit (1) is formed.

The shield electrode (21) is formed in the wiring layers after the second wiring layer and has a power supply potential V that is grounded in terms of AC. 0 or the ground potential GND is applied. This shield electrode (21)
By providing this, the shield electrode (21) is fixed at a potential that is grounded in AC terms, so unnecessary radiation from the FM front-end circuit (1), especially the local oscillation circuit (<2) that involves oscillation operation, is eliminated. to block interference with other circuits and interference signals from other circuits.

At this time, the ground line (13) and power line (14)
If you try to do this on the first wiring layer and the shield electrode (21) on the second wiring layer, since there is a partition line (17), the pine 1-(1) in the FM front end circuit (1)
8) The degree of freedom in designing the connection wiring between the two is limited. Therefore, F.M.
By removing the partition line (17), the front end circuit (1) can be completed with a two-layer wiring structure. In this way, the FM front end circuit (1) is connected to the mat (18)
By arranging the mats (18) in an area corresponding to an integer number of mats (18), it is easy to combine a large number of mats (18) in correspondence with the rectangular shape of the semiconductor chip (11), regardless of whether the mats (18) are Moreover, the ease of relocation, replacement, deletion, etc. of the FM front end circuit (1) block is not impaired.

The pattern of the FM front end circuit (1) is shown in FIG. The second measure against interference is that the local oscillation circuit (2) section is provided with a shield electrode (21a) alone;
21) from having a common impedance, the shield electrode (21) is firmly fixed to the alternating current ground potential, thereby stabilizing the circuit operation.

This is it, seal FIt! (2t) within the FM front end circuit (1) and interference current from other circuits via the shield electrode (21) to the local oscillation circuit (2).
This also prevents interference caused by reaching the area. A shield electrode (21b) that covers the mixing circuit (3) and a shield electrode (21c) that covers the other accompanying circuits 1[i-
) can also be divided into separate layers to stabilize the negative layer circuit operation.

The third measure against interference is to provide a ground electrode pad (19a) dedicated to the local oscillation circuit (2), and connect the ground line (1
3a) is also provided separately from the others to prevent interference due to any of the ground potential GND wiring having a common impedance. Ground lines (13b) (13c) for the mixing circuit (3) and the other accompanying circuits are also extended individually and connected to the ground electrode pad (19). At that time, the ground lines (13a) (13b) (
13c) and shield electrodes (21a) (21b) (21c
) to the ground electrode pad (1
9), the ground line (1
3) Minimize unnecessary potential increases due to wiring impedance. The lead terminal for external connection also has a local oscillation circuit (
2) Set it up exclusively. With this configuration, the ground potential GND applied to the local oscillation circuit (2) is firmly fixed, and interference from other circuits is avoided, thereby stabilizing the circuit operation.

The fourth measure against interference is the FM front end circuit (1)
By placing the local oscillation circuit (2) in the corner of the
). In this way, the local oscillation circuit (2) is separated by a distance, and the surroundings of the local oscillation circuit (2) are connected to the mixing circuit (3) and the shield electrodes (21b) (21c) for the other accompanying circuits. , so that signal interference from the FM-IF amplifier circuit (4) can be minimized. Placing the distance to the corner also makes it possible to minimize the length of the ground line (13a) from the ground electrode pad (19a) to the local oscillation circuit (2), which contributes to stable operation of the local oscillation circuit (2). also contributes.

The fifth measure against interference is the FM front end circuit (1)
A suction electrode (22) is provided in the region to make ohmic contact with the semiconductor substrate. Suction electrode (22)
is a ground line (1) extending between the local oscillation circuit (2) and the mixing circuit (3) and the other associated circuits.
30) and sucks out the leakage current flowing between them, and also performs saturation operation in the circuit element.
It is installed in the immediate vicinity of circuit elements such as transistors, capacitors, and resistors that are expected to leak leakage current to suck out leakage current. The leakage current that has been sucked out is directly transferred to the ground electrode pad (19b) via the ground line (13c).
) or the ground line (13b) (13c) that is sucked out to the shield electrode (21a) (21b>(21c) that covers the circuit) and contacts the shield electrode (21a) (21b) (21c) (13d) are connected to the ground electrode pads (19a) and (19b). Only the local oscillation circuit (2) is connected to the ground line (13d) that provides the ground potential GND to the extraction electrode (13d) and the shield electrode (21a). A ground line (1
By providing 3a) separately, the influence of the ground potential GND rising due to the leaked current is avoided. This configuration prevents mutual interference due to leakage current through the substrate surface.

The sixth interference measure is to surround the FM front end circuit (1) storage area with a dummy island (23), which is a feature of the present invention.

In Figure 1, (24) is the storage area for the local oscillation circuit (2), (25) is the storage area for the mixing circuit (3), and (2B)
is a storage area for the other accompanying circuits, and first F
The entire M front end circuit (1) block is completely surrounded by a dummy island (23), and the local oscillation circuit (2) is
) storage area (24) is further expanded to a dummy island (
23a). A dedicated ground electrode pad (
19a) The formation region is also housed within the dummy island (23a) surrounding the local oscillation circuit (2), and a ground potential is applied to the substrate via the isolation region. The dummy island (23) is a region surrounded by a highly doped isolation region connected to the substrate and electrically insulated from the others, so the dummy island (23) is at the power supply potential V. A blotting state is established in which 0 or no potential is applied.

The cross-sectional structure of the FM front-end circuit (1) portion where the shield electrode (21), extraction electrode (22) and dummy island (23) have been processed is as shown in FIG.

In FIG. 5, (27) is a P-type semiconductor substrate, <28)
29) is an N type epitaxial layer, an N+ type buried region (30) is a P+ type isolation region connected to the substrate (21), and (29) is a P+ type isolation region connected to the substrate (21).
31) is an island for element formation, (23) (23a)
is a dummy island, (32) and (33) are P or N type diffusion regions for forming circuit elements, and <34) is for epitaxy.
(35) is the inter-element connection wiring by the first wiring layer, (13b) (13c) are the ground lines, (22) is the extraction electrode, (36) is the interlayer insulating film , (21a) and (21b) are shield electrodes formed by second layer wiring. As is clear from the figure, the dummy islands (23) (23a) are formed by an epitaxial layer (28), and a P+ type isolation region (30) reaching from the surface of the substrate (27) to which the ground potential GND is applied is formed by an epitaxial layer (28). (
28). According to this configuration, a resistance component is inserted between the regions on both sides sandwiching the dummy island (23) by the N-type high resistance layer of the dummy island (23), so that the current flows horizontally with the substrate (27). Passage of leakage current can be blocked, and circuit interference caused by both leakage currents can be prevented. Further, since the potential barrier of the PN junction formed by the dummy island (23) and the isolation region (30) substantially increases the resistance component, the coupling between the negative layer circuits can be made coarse. In addition, there is a ground line (
13b) (13c) or as an extension area for the power supply line (14), the occupied area can be used effectively.

FM front end circuit block (1) explained above
In addition to countermeasures against interference in parts, further interference countermeasures can be taken by using the divided regions (12). That is, as mentioned above, since the divided area (12) requires a relatively large area, the FM front end circuit (1) is integrated into the semiconductor chip (11) by using the mat M or an area corresponding thereto. By placing it in the corner of the FM-IF amplifier circuit (4) and using mat E to mat I,
Both are placed with the divided area (12) in between. With this configuration, both can be separated by the divided area (12), so mutual interference can be minimized.

Furthermore, as shown in Fig. 2, by utilizing the occupied area of the divided area (12), a dummy island (2) as shown in Fig. 5 is added to this area.
By providing a large number of 3), mutual interference due to negative layer leakage current can be prevented.

FIG. 6 shows an FM/AM receiver constructed using an IC that also incorporates the FM front end circuit (1). In the same figure, (40) is a mixing circuit (
3) or a tuning circuit that outputs to the mixing circuit of the AM tuner circuit (7), (al) (42) is a surface acoustic wave filter (
43) from the output signal of the mixing circuit (3)
The first step is to extract the IF multiplied signal. second filter circuit, (44
) is the passive circuit element of the local oscillation circuit <2) that determines the oscillation frequency of the FM/local oscillation circuit (2), and (45) is the voltage controlled oscillation circuit (VC) of the multiplex decoder circuit (6).
A crystal oscillator that determines the oscillation frequency of O), (46) is A
Filter circuit that passes the M/IF multiplied signal (47)
is a passive circuit element of the local oscillation circuit of the AM tuner circuit (7), and (48) is an output terminal of the L and RfJv channels. In addition, capacitors and resistors whose element constants are difficult to integrate are externally attached to realize the entire circuit.

According to the above configuration, the FM/
Since an AM tuner can be realized, an inexpensive tuner can be constructed by reducing the number of parts.

(G) As described in detail, according to the present invention, interference is prevented by surrounding the FM front end circuit (1) with a dummy island (23), and the FM front end circuit (1) is also surrounded by a dummy island (23).
It has the advantage of being able to realize chipped ICs.

In addition, since the entire IC is laid out based on the mat (18) and combined with mats (18), parallel design for each circuit block or each mat (18) is possible, significantly shortening the pattern design period. can be achieved. Also,
Since circuit changes can be made for each circuit block or each mat (18), there is no need to change the design of the entire IC, and there is an advantage that the reliability of the previous model can be used while maintaining the reliability of the previous model except for the changed parts.

Then, the FM front end circuit (1) is connected to the mat (18
), and dummy islands (23
) can prevent interference, so the FM front end circuit (1) block can be treated like any other circuit, and the mat (1) block can be treated like any other circuit.
This has the advantage that the ease of pattern design provided by the combination of item 8> is not impaired.

Furthermore, since the semiconductor integrated circuit described above can also integrate the FM front-end circuit (1) into one chip, it is possible to integrate passive circuit elements such as capacitors, resistors, and varistors that are difficult to integrate in terms of value, and the circuit that constitutes the tuning circuit (40). By adding elements, there is an advantage that an inexpensive and high-performance FM/AM tuner can be constructed.

[Brief explanation of the drawing]

Figure 1 is an enlarged plan view of the main parts for explaining the present invention, Figures 2 and 3 are plan views for explaining the present invention, and Figure 4 is F
FIG. 5 is an enlarged plan view showing the M front end circuit (1) part, FIG. 5 is a sectional view of the main part of FIG. 4, FIG. 6 is a circuit diagram for explaining the radio receiver of the present invention, and FIG. 7 is an FM FIG. 2 is a circuit diagram showing an AM tuner circuit. (11) is a semiconductor chip, (12) is a divided area, (
13) is the ground line, (14) is the power line,
(17) is the division line, (18> is the mat,
(19) is a ground electrode pad, (21) is a shield electrode, (23) is a dummy island, (30) is a separation region, and (40> is a tuning circuit).

Claims (7)

[Claims] (1) Includes at least a local oscillation circuit and a mixing circuit
A front-end circuit block that converts a radio frequency signal into an IF (intermediate frequency) signal and an IF amplification circuit block that amplifies and limits the amplitude of the IF signal are integrated on the same semiconductor substrate, and the front-end circuit block is integrated on the same semiconductor substrate. A semiconductor integrated circuit characterized in that it is completely surrounded by a dummy island surrounded by a highly concentrated isolation region of the same conductivity type connected to a semiconductor substrate. (2) The semiconductor integrated circuit according to claim 1, wherein the local oscillation circuit and other circuits of the front end circuit are separated by the dummy island. (3) The semiconductor integrated circuit according to claim 1, further comprising a ground electrode pad dedicated to the local oscillation circuit. (4) By dividing the semiconductor chip into a plurality of regions of substantially the same size by arranging a plurality of division lines in parallel on the surface of the semiconductor chip, each of which has a power supply line and a ground line extending in pairs, A front-end circuit block having at least a local oscillation circuit is formed in an area approximately equal to the area of an integral number of mats, and a plurality of circuit blocks having different functions from the front-end circuit are each formed on an integral number of mats. 1. A semiconductor integrated circuit, wherein the front end circuit is completely surrounded by a dummy island surrounded by a high concentration isolation region of the same conductivity type connected to the semiconductor substrate. (5) The semiconductor chip is divided into first and second regions by a dividing region extending substantially in a straight line through the center of the semiconductor chip, and a power supply line and a ground line are extended in pairs in a direction perpendicular to the dividing region. dividing the first and second regions into a plurality of regions of substantially the same size by arranging a plurality of partition lines in parallel, each region being made into a mat;
A power supply or ground line individually connected to the electrode pad is extended over the divided area, and a front-end circuit block including at least a local oscillation circuit is formed in an area approximately equal to the area of an integral number of mats, The end circuit is a dummy island in which a plurality of circuit blocks with different functions are housed in an integral number of mats, and the periphery of the front end circuit block is surrounded by a highly concentrated isolation region of the same conductivity type that connects to the semiconductor substrate. A semiconductor integrated circuit characterized by being completely enclosed. (6) The local oscillation circuit of the front-end circuit block is placed in a corner of the semiconductor chip, and the IF (intermediate frequency) signal output from the front-end circuit block is placed diagonally across the semiconductor chip, sandwiching the divided area. 6. The semiconductor integrated circuit according to claim 5, further comprising an IF amplifier circuit block for amplifying and limiting amplitude. (7) A radio receiver characterized in that external parts are added to the semiconductor integrated circuit according to claim 1, 4, or 5.