JPH0222886A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH0222886A JPH0222886A JP17321288A JP17321288A JPH0222886A JP H0222886 A JPH0222886 A JP H0222886A JP 17321288 A JP17321288 A JP 17321288A JP 17321288 A JP17321288 A JP 17321288A JP H0222886 A JPH0222886 A JP H0222886A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- board
- hybrid integrated
- element chip
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 11
- 238000007789 sealing Methods 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 2
- 241000251468 Actinopterygii Species 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to hybrid integrated circuits.
混成集積回路は、両側に外部接続用のリード10を接線
した印刷配線基板2の上表面に受動素子チップ5及び能
動素子チップ8を搭載し、ボンディングワイヤ7を用い
て回路配線6に接続した混成集積回路を形成し、次にト
ランスファモールド方式又はキャスティングモールド方
式等を用いて樹脂封止部3aで封止していた。The hybrid integrated circuit is a hybrid integrated circuit in which a passive element chip 5 and an active element chip 8 are mounted on the upper surface of a printed wiring board 2 with external connection leads 10 tangentially connected on both sides, and are connected to circuit wiring 6 using bonding wires 7. An integrated circuit is formed and then sealed with a resin sealing portion 3a using a transfer molding method, a casting molding method, or the like.
ここで、印刷配線基板2の裏面には−、スルーホール4
を介して一部に電気配線がされていた。Here, on the back side of the printed wiring board 2, - and through holes 4 are provided.
There was electrical wiring in some parts.
上述した従来の混成集積回路は、外部接続用端子リード
フレームのみであるので、高機能化に対応して回路構成
を大規模するために外部接続端となるリードを増加させ
るとパッケージが大きくなり、実装幅りの混成集積回路
実装基板の小型化を防げるという欠点があった。The conventional hybrid integrated circuit described above has only a terminal lead frame for external connection, so increasing the number of leads that serve as external connection terminals in order to increase the scale of the circuit configuration in response to higher functionality will result in a larger package. The drawback is that it prevents the miniaturization of a hybrid integrated circuit mounting board with a mounting width.
本発明の目的は、高機能かつ実装幅が小型の混成集積回
路にある。An object of the present invention is to provide a hybrid integrated circuit with high functionality and a small mounting width.
本発明の混成集積回路は、スルーホールを有する印刷配
線基板の一主面に載置された受動素子チツブ及び能動素
子チップと、該受動素子チップ及び能動素子チップ間を
接続する金属配線とを含んで封止する樹脂封止部とを有
する混成集積回路において、前記印刷配線基板の他の主
面の少なくとも一部前記樹脂封市部から露出し、前記ス
ルーホールを介して外部接続用の電極を設けて構成され
ている。The hybrid integrated circuit of the present invention includes a passive element chip and an active element chip placed on one main surface of a printed wiring board having a through hole, and metal wiring connecting the passive element chip and the active element chip. In the hybrid integrated circuit, at least a part of the other main surface of the printed wiring board is exposed from the resin sealing part, and an electrode for external connection is connected through the through hole. It is set up and configured.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.
混成集積回路は、印刷配線基板2の3ケのスルーホール
4の裏面端に外部接続用のリードフレームの代りのバン
プ1を設け、樹脂封止部3が印刷配線基板2の上面及び
側面を封止しており下部がバンプ1を露出していること
が第2図の樹脂封止部3aと異る魚具外は従来の混成集
積回路と同様である。In the hybrid integrated circuit, bumps 1 instead of lead frames for external connection are provided at the back end of three through holes 4 of a printed wiring board 2, and a resin sealing part 3 seals the top and side surfaces of the printed wiring board 2. The fish implement is similar to the conventional hybrid integrated circuit except that it is different from the resin sealing part 3a of FIG. 2 in that it is sealed and the bump 1 is exposed at the bottom.
印刷配線基板2の裏面にはバンプ1を除いてソルダレジ
スト層9が形成されてあり、直接外部の実装基板に実装
できる。A solder resist layer 9 is formed on the back surface of the printed wiring board 2 except for the bumps 1, so that it can be directly mounted on an external mounting board.
この場合に実装幅となる混成集積回路の幅、Qは、従来
のリード10の実装幅りよりは短いので、実装幅の小型
化が可能となる。In this case, the width Q of the hybrid integrated circuit, which is the mounting width, is shorter than the mounting width of the conventional lead 10, so it is possible to reduce the mounting width.
以上説明したように本発明は、印刷配線基板の一方の主
面の少くとも一部を樹脂封止部から露出させ、外部接続
用の電極又はバンプ等を設ける事、更に必要に応じてソ
ルダレジスト等を実施する事により、パッケージの下面
より全ての外部接続用端子が取れるため実装寸法が短く
なり、結果として外部実装基板への高密度実装を可能と
する効果がある。As explained above, the present invention includes exposing at least a part of one main surface of a printed wiring board from a resin sealing part, providing electrodes or bumps for external connection, and further applying solder resist as necessary. By implementing the above, all the external connection terminals can be removed from the bottom surface of the package, resulting in a shortened mounting dimension and, as a result, the effect of enabling high-density mounting on an external mounting board.
また、印刷配線基板から容易に外部接続用電極端を設け
る事ができるので、多ビン化に容易に対応できる効果が
ある。Further, since the electrode ends for external connection can be easily provided from the printed wiring board, there is an effect that it is possible to easily cope with the increase in the number of bins.
第1図は本発明の一実施例の断面図、第2図は従来の混
成集積回路の一例の断面図である。
1・・・バンプ、2・・・印刷配線基板、3・・・樹脂
封止部、4・・・スルーホール、5・・・受動素子チッ
プ、6・・・回路配線、7・・・ボンディングワイヤ、
8・・・能動素子チップ。
b伺巨里刀秦子九フ。FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of an example of a conventional hybrid integrated circuit. DESCRIPTION OF SYMBOLS 1... Bump, 2... Printed wiring board, 3... Resin sealing part, 4... Through hole, 5... Passive element chip, 6... Circuit wiring, 7... Bonding wire,
8...Active element chip. b Kyogori sword Hatako Kufu.
Claims (1)
れた受動素子チップ及び能動素子チップと、該受動素子
チップ及び能動素子チップ間を接続する金属配線とを含
んで封止する樹脂封止部とを有する混成集積回路におい
て、前記印刷配線基板の他の主面の少なくとも一部を前
記樹脂封止部から露出し、前記スルーホールを介して外
部接続用の電極を設けたことを特徴とする混成集積回路
。A resin sealing part that includes and seals a passive element chip and an active element chip placed on one main surface of a printed wiring board having a through hole, and metal wiring connecting between the passive element chip and the active element chip. In the hybrid integrated circuit, at least a part of the other main surface of the printed wiring board is exposed from the resin sealing part, and an electrode for external connection is provided through the through hole. Hybrid integrated circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17321288A JPH0222886A (en) | 1988-07-11 | 1988-07-11 | Hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17321288A JPH0222886A (en) | 1988-07-11 | 1988-07-11 | Hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0222886A true JPH0222886A (en) | 1990-01-25 |
Family
ID=15956201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17321288A Pending JPH0222886A (en) | 1988-07-11 | 1988-07-11 | Hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0222886A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03222492A (en) * | 1990-01-29 | 1991-10-01 | Toshiba Corp | Hybrid module |
US6014318A (en) * | 1997-10-27 | 2000-01-11 | Nec Corporation | Resin-sealed type ball grid array IC package and manufacturing method thereof |
EP1065915A3 (en) * | 1999-06-30 | 2003-05-02 | Murata Manufacturing Co., Ltd. | Electronic part, dielectric filter, dielectric duplexer, and manufacturing method of the electronic part |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5779652A (en) * | 1980-11-05 | 1982-05-18 | Nec Corp | Resin-sealed semiconductor device |
-
1988
- 1988-07-11 JP JP17321288A patent/JPH0222886A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5779652A (en) * | 1980-11-05 | 1982-05-18 | Nec Corp | Resin-sealed semiconductor device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03222492A (en) * | 1990-01-29 | 1991-10-01 | Toshiba Corp | Hybrid module |
US6014318A (en) * | 1997-10-27 | 2000-01-11 | Nec Corporation | Resin-sealed type ball grid array IC package and manufacturing method thereof |
EP1065915A3 (en) * | 1999-06-30 | 2003-05-02 | Murata Manufacturing Co., Ltd. | Electronic part, dielectric filter, dielectric duplexer, and manufacturing method of the electronic part |
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