JPH02220142A - Diagnostic controller for microprocessor - Google Patents

Abstract

PURPOSE:To shorten the time when a microprocessor is occupied for diagnosis by setting a signal line containing a buffer memory between the microprocessor and a diagnostic control processor in addition to an inter-processor data bus. CONSTITUTION:A signal line containing a buffer memory 1 is set between a microprocessor 22 and a diagnostic control processor 21 in addition to an inter-processor data bus 23. The information on a control memory part 24 is once transferred to the memory 1 and then to the processor 21. In this case, the information can be transferred to the memory 1 in an extremely short time compared with the transfer of information carried out via the microprocessor 22 and the bus 23. As a result, the time when the processor 22 is occupied by the processor 21 is shortened and the working of the processor 22 is never stopped. Thus an original process is smoothly carried out.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprocessor diagnostic control device for an information processing device.

[Conventional technology]

As storage devices have become IC memories and peripheral circuits have become more integrated into LSIs, the tendency of their failures has also changed.

In IC memories, which have become increasingly integrated into LSIs, failures in storage elements account for 90% of the time, making it important to take measures to improve the reliability of storage elements. For this reason, there is a need for a diagnostic device that can grasp the failure status of storage elements and the like.

FIG. 2 shows a conventional example.

In the conventional example shown in FIG. 2, an external input/output unit 20 inputs commands from the outside and outputs information to the outside.
and a diagnostic control processor 2 that performs diagnostic control of the microprocessor 22 based on instructions from the external input/output unit 20.
1, a microprocessor 22 and a diagnostic control processor 2
1, an inter-processor data bus 23 provided between the
It is comprised of a control storage section 24 into which data used for diagnosing the microprocessor 22 is input.

Next, the operation of the conventional example shown in FIG. 2 will be explained.

The control storage unit 24 stores the processing contents when the microprocessor 22 is executing normal processing, and also stores information such as the location of the abnormality and its contents when an abnormality occurs. . Therefore, when a failure occurs in the microprocessor 22 and you want to know the details of the failure,
The operator inputs a command for executing diagnosis to the diagnostic control processor 21 from the external input/output unit 20 . Diagnostic control processor 21 instructs microprocessor 22 to obtain information stored in control storage 24 .

This information is transmitted from microprocessor 22 to diagnostic control processor 21 via interprocessor data bus 23. Since there is only the inter-processor data bus 23 between the microprocessor 22 and the diagnostic control processor 21, in order for the diagnostic control processor 21 to obtain the information stored in the control storage section 24, the microprocessor 22 must first be connected to the microprocessor 22. Either stop the operation and get the data from another path, or
Or, without stopping the operation of the microprocessor 22,
The diagnostic control processor 21 occupies the microprocessor 22 to obtain data.

[Problem to be solved by the invention]

In the above-mentioned conventional example, in order for the diagnostic control processor to obtain the information stored in the control storage unit, it must first stop the operation of the microprocessor and obtain data from another path, or
Alternatively, it may be performed without stopping the operation of the microprocessor. However, the method of stopping the operation of the microprocessor and obtaining data from another path has the disadvantage that the original processing of the microprocessor must be completely interrupted. In addition, in order for the microprocessor to operate without stopping, the diagnostic control processor must occupy the microprocessor since there is only an inter-processor data bus between the microprocessor and the diagnostic control processor. This time is considerable because the diagnostic control processor obtains the information stored in the control storage unit through the interprocessor data bus and the microprocessor, and this creates the inconvenience that other processing cannot be performed during this time. was.

[Purpose of the invention]

An object of the present invention is to provide a microprocessor diagnostic control device that improves the disadvantages seen in the conventional example, reduces the time that the microprocessor is occupied during diagnosis, and does not interfere with the execution of normal processing. There is a particular thing.

[Means to solve the problem]

The zero-source ILr consists of an external input/output unit that inputs instructions from the outside and outputs information to the outside, a diagnostic control processor that performs diagnostic control of the microprocessor based on instructions from the external input/output unit, and a microprocessor and diagnostic control. The microprocessor includes an interprocessor data bus connected to the processor, and a control storage section into which data used for diagnosing the microprocessor is input. A method is adopted in which a signal line equipped with a buffer memory is arranged in parallel with the inter-processor data bus between the microprocessor and the diagnostic control processor. This aims to achieve the above-mentioned purpose.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

Note that the same reference numerals are used for the same constituent members as in the conventional example described above.

In the embodiment shown in FIG. 1, an external input/output unit 20 inputs commands from the outside and outputs information to the outside.
and a diagnostic control processor 2 that performs diagnostic control of the microprocessor 22 based on instructions from the external input/output unit 20.
1, a microprocessor 22 and a diagnostic control processor 2
1, and a control storage section 24 into which data used for diagnosing the microprocessor 22 is input. In addition to an inter-processor data bus 23, a signal equipped with a buffer memory 1 is provided between the microprocessor 22 and the diagnostic control processor 21.

Next, the operation of the embodiment shown in FIG. 1 will be explained.

As in the conventional example described above, the control storage unit 24 stores information such as the contents of the processing when the microprocessor 22 is executing normal processing, and information such as the location of the abnormality and its contents when an abnormality occurs. I remember it all the time. Therefore, if you want to check the status of the microprocessor 22 or know the location and details of the failure in the case of a failure in the microprocessor 22, you can look at the information stored in the control storage unit 24.

First, when the operator wants to check the status of the microprocessor 22, the operator instructs the diagnostic control processor 21 from the external input/output section 20 to memory dump the contents of the control storage section 24 into the buffer memory l. To do this, the diagnostic control processor 21 transmits the instructions received from the external input/output unit 20 to the microprocessor 22 via the interprocessor data bus 23. The microprocessor 22 occupies the buffer memory 1 according to the received command and writes the contents of the memory dump from the control storage section 24 to the buffer memory 1. When the memory dump is completed, the microprocessor 22 releases the buffer memory 1 and notifies the diagnostic control processor 21 through the inter-processor data bus 23 that the memory dump has been completed. Thereafter, the microprocessor 22 is released from occupying the diagnostic control processor 21 and executes its own original processing. The diagnostic control processor 21 occupies the buffer memory 1 based on the signal indicating that the memory dump is completed, stores data therein in its own storage area, and releases the occupancy of the buffer memory 1. In this way, the diagnostic control processor 21 can obtain the information stored in the control storage section 24.The diagnostic control processor 21 transfers the stored contents to the external input/output section 20 and outputs them. do.

On the other hand, when some kind of failure occurs in the microprocessor 22, in order to notify the abnormality and its contents,
The microprocessor 22 sends a memory dump request command to the diagnostic control processor 21 through the inter-processor data bus 23. Then, it occupies the buffer memory 1 and transfers the memory table storing the failure details in the control storage section 24 to the buffer memory 1. After the transfer is completed, the microprocessor 22 transfers the buffer memory 1
and notifies the diagnostic control processor 21 that the transfer has been completed. After that, the microprocessor 22
is released from occupying the diagnostic control processor 21 and executes its own original processing.

The diagnostic control processor 21 occupies the buffer memory 1 based on the transfer completion signal from the microprocessor 22, stores the memory table transferred to the buffer memory 1 in its own storage area, and transfers the memory table to the buffer memory 1. Release the possession of. The diagnostic control processor 21 then transfers the stored contents to the external input/output unit 20 and outputs them.

[Effects of the Invention] As explained above, according to the present invention, in addition to the inter-processor data bus, a signal line equipped with a buffer memory is arranged in parallel between the microprocessor and the diagnostic control processor. The information in the control storage unit is once transferred to a buffer memory and then transferred to the diagnostic control processor. At this time, the information in the control storage section is transferred to the buffer memory in an extremely short time compared to transferring the information via the microprocessor and the inter-processor data bus, so the diagnostic control processor The time occupied by the microprocessor can be significantly reduced. Therefore, it is possible to provide an unprecedented microprocessor diagnostic control device that does not stop the microprocessor and rarely interferes with the execution of the original processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional example. DESCRIPTION OF SYMBOLS 1... Buffer memory, 20... External input/output unit, 21... Diagnostic control processor, 23
...Inter-processor data bus, 24...
- Control storage unit.

Claims (1)

[Claims] (1) an external input/output unit that inputs instructions from the outside and outputs information to the outside; a diagnostic control processor that performs diagnostic control of a microprocessor according to instructions from the external input/output unit; and the microprocessor and the diagnostic control processor. A microprocessor diagnostic control device comprising an inter-processor data bus installed between the microprocessor and the diagnostic control device, and a control storage section into which data used for diagnosing the microprocessor is input. A microprocessor diagnostic control device, characterized in that, in addition to the inter-processor data bus, a signal line equipped with a buffer memory is arranged between the microprocessor and the processor.