JPH02185047A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH02185047A
JPH02185047A JP1005190A JP519089A JPH02185047A JP H02185047 A JPH02185047 A JP H02185047A JP 1005190 A JP1005190 A JP 1005190A JP 519089 A JP519089 A JP 519089A JP H02185047 A JPH02185047 A JP H02185047A
Authority
JP
Japan
Prior art keywords
bonding
pad electrode
ribbon
bonding pad
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1005190A
Other languages
English (en)
Inventor
Hiroshi Takeuchi
洋 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1005190A priority Critical patent/JPH02185047A/ja
Publication of JPH02185047A publication Critical patent/JPH02185047A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6611—Wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45013—Cross-sectional shape being non uniform along the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特にリードフレームと半導
体チップ上のボンディングパッド電極を接続するボンデ
ィングリボンの改良に関°する。
〔従来の技術〕
従来、この種の半導体装置におけるリードフレームとボ
ンディングパッド電極との接続は、単線ボンディングワ
イヤ、又は複数のボンディングワイヤ、又はボンディン
グリボンが使用されていた。
〔発明が解決しようとする課題〕
上述した従来の半導体装置において、ボンディングに単
線のボンディングワイヤを使用した場合は、複数のボン
ディングワイヤを使用した場合又はリボンを使用した場
合よりも、インダクタンスが大きくなり、高周波動作時
の半導体装置の電気的特性が低下するという欠点がある
。
また、複数のボンディングワイヤを使用した場合とリボ
ンを使用した場合は、単線のボンディングワイヤを使用
した場合に比べて、広いボンディングパッド電極面積が
必要となり、ボンディングパッド電極の寄生容置が大き
くなり、高周波動作時の半導体装置の電気的特性が低下
するという欠点がある。
本発明の目的は前記課題を解決した半導体装置を提供す
ることにある。
【課題を解決するための手段〕
前記目的を達成するため１本発明はリードフレーム上に
固着される半導体チップと、前記半導体チップ上に設け
られるボンディングパッド電極と。
リードフレームの外部リードを接続するボンディングリ
ボンと、前記ボンディングパッド電極を除く前記半導体
チップ表面を被覆するシリコン窒化膜からなるパッジベ
ージ１ン膜と、前記リードフレームを固定するパッケー
ジとからなる半導体装置において、ボンディングリボン
の形状を、接続点で細く中央部で幅広い形状にしたもの
である。
〔実施例〕
次に本発明を図面を参照して説明する。
第１図は本発明の一実施例を示す平面図、第２図は第１
図のＡ−Ａ線断面図である０図において、本実施例に係
る半導体装置はリードフレーム１と。
これにダイボンディングされた半導体チップ２上のボン
ディングパッド電極４と、リードフレーム１の外部リー
ド７とを接続するボンディングリボン５と、シリコン窒
化膜からなるパッシベーション膜３と、パッケージ６と
を含み、ボンディングリボン５の形状を接続点５ａで細
く中央部５ｂで幅広いひし形としたものである。
本実施例によれば、ボンディングリボン５はボンディン
グパッド電極４と外部リード７とのそれぞれの接続点５
ａで単線ボンディングパッド程度の太さであり、ボンデ
ィングリボン５の中央部５ｂでは幅広であるため、ボン
ディングパッド電極４の面積を広げず、かつ寄生容量を
増加することなしに、インダクタンスを低下させること
ができる。
これにより、高周波動作時の半導体装置の電気的特性の
向上が望まれる。
〔発明の効果〕
以上説明したように本発明はボンディングリボンの形状
を接続点で細く、中央部で幅広にすることにより、ボン
ディングパッド電極面積を単線ボンディングワイヤ使用
時と同程度で、かつリアクタンスを低減できる効果があ
る。
【図面の簡単な説明】
第１図は本発明の一実施例を示す要部平面図、第２図は
第１図のＡ−Ａ線断面図である。 １・・・リードフレーム　　　２・・・半導体チップ３
・・・シリコン窒化膜からなるパッシベーション膜４・
・・ボンディングパッド電極 ５・・・ボンディングリボン　６・・・パッケージ７・
・・外部リード

Claims (1)

    【特許請求の範囲】
  1. （１）リードフレーム上に固着される半導体チップと、
    前記半導体チップ上に設けられるボンディングパッド電
    極と、リードフレームの外部リードを接続するボンディ
    ングリボンと、前記ボンディングパッド電極を除く前記
    半導体チップ表面を被覆するシリコン窒化膜からなるパ
    ッシベーシヨン膜と、前記リードフレームを固定するパ
    ッケージとからなる半導体装置において、ボンディング
    リボンの形状を、接続点で細く中央部で幅広い形状にし
    たことを特徴とする半導体装置。
JP1005190A 1989-01-12 1989-01-12 半導体装置 Pending JPH02185047A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1005190A JPH02185047A (ja) 1989-01-12 1989-01-12 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1005190A JPH02185047A (ja) 1989-01-12 1989-01-12 半導体装置

Publications (1)

Publication Number Publication Date
JPH02185047A true JPH02185047A (ja) 1990-07-19

Family

ID=11604302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1005190A Pending JPH02185047A (ja) 1989-01-12 1989-01-12 半導体装置

Country Status (1)

Country Link
JP (1) JPH02185047A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03173446A (ja) * 1989-12-01 1991-07-26 Matsushita Electron Corp 半導体装置
EP0803907A3 (en) * 1996-04-24 1999-07-28 Honda Giken Kogyo Kabushiki Kaisha Ribbon, bonding wire and microwave circuit package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03173446A (ja) * 1989-12-01 1991-07-26 Matsushita Electron Corp 半導体装置
EP0803907A3 (en) * 1996-04-24 1999-07-28 Honda Giken Kogyo Kabushiki Kaisha Ribbon, bonding wire and microwave circuit package
US6331806B1 (en) 1996-04-24 2001-12-18 Honda Giken Kogyo Kabushiki Kaisha Microwave circuit package and edge conductor structure

Similar Documents

Publication Publication Date Title
US4107728A (en) Package for push-pull semiconductor devices
JP2000133767A (ja) 積層化半導体パッケ―ジ及びその製造方法
US4193083A (en) Package for push-pull semiconductor devices
US20050035448A1 (en) Chip package structure
JPH03285338A (ja) ボンディングパッド
JPH02185047A (ja) 半導体装置
JPH0217664A (ja) レジンモールド型高周波用半導体装置およびその製造方法
JPH07101698B2 (ja) 樹脂封止型半導体装置の製造方法
JPH05235245A (ja) 半導体集積回路装置
JPH0621305A (ja) 半導体装置
JPS63120431A (ja) 電力用半導体装置
JPS5930538Y2 (ja) 半導体装置
JP2004146488A (ja) 半導体装置およびその製造方法
JPH07335818A (ja) 半導体装置
KR950014116B1 (ko) 반도체 장치 및 그 제조방법
KR100267220B1 (ko) 반도체소자패키지및그의제조방법
JPH11150134A (ja) 半導体装置
JPH0621319A (ja) 半導体装置用リードフレーム
JPS5828369Y2 (ja) 可変容量ダイオ−ド装置
JPS6142952A (ja) 半導体装置
JPH04164340A (ja) 半導体集積回路
JPH0498861A (ja) 樹脂封止型半導体装置
JPH02166743A (ja) 半導体集積回路装置
JPH05183090A (ja) 樹脂封止型半導体装置
JPH04147658A (ja) 半導体装置