JPH0214741B2 - - Google Patents

Info

Publication number
JPH0214741B2
JPH0214741B2 JP9177483A JP9177483A JPH0214741B2 JP H0214741 B2 JPH0214741 B2 JP H0214741B2 JP 9177483 A JP9177483 A JP 9177483A JP 9177483 A JP9177483 A JP 9177483A JP H0214741 B2 JPH0214741 B2 JP H0214741B2
Authority
JP
Japan
Prior art keywords
information processing
processing device
external information
port ram
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9177483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59216268A (ja
Inventor
Kazuyoshi Kuwabara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP9177483A priority Critical patent/JPS59216268A/ja
Publication of JPS59216268A publication Critical patent/JPS59216268A/ja
Publication of JPH0214741B2 publication Critical patent/JPH0214741B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP9177483A 1983-05-25 1983-05-25 マルチポ−トｒａｍを有する情報処理装置 Granted JPS59216268A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9177483A JPS59216268A (ja) 1983-05-25 1983-05-25 マルチポ−トｒａｍを有する情報処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9177483A JPS59216268A (ja) 1983-05-25 1983-05-25 マルチポ−トｒａｍを有する情報処理装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP13413487A Division JPS62295165A (ja) 1987-05-29 1987-05-29 マルチポ−トｒａｍ

Publications (2)

Publication Number Publication Date
JPS59216268A JPS59216268A (ja) 1984-12-06
JPH0214741B2 true JPH0214741B2 (US20030199744A1-20031023-C00003.png) 1990-04-09

Family

ID=14035926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9177483A Granted JPS59216268A (ja) 1983-05-25 1983-05-25 マルチポ−トｒａｍを有する情報処理装置

Country Status (1)

Country Link
JP (1) JPS59216268A (US20030199744A1-20031023-C00003.png)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62221747A (ja) * 1986-03-19 1987-09-29 Fujitsu Ltd マルチ・ポート・メモリ
JPH0397744U (US20030199744A1-20031023-C00003.png) * 1990-01-23 1991-10-08

Also Published As

Publication number Publication date
JPS59216268A (ja) 1984-12-06

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