JPH02138745A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To separate a high-concentration external base from an emitter and a low-concentration internal base by a prescribed degree and to reduce a leakage current between the emitter and the base by a method wherein this high- concentration external base is formed in a bipolar semiconductor device to lessen a base resistance and a self-line technique is used. CONSTITUTION:An isolation oxide film 2 and a low-concentration internal base 3, which is formed by ion-implantation and has d prescribed depth, are formed on an N-type semiconductor substrate 1. Then, an SiO2 film 4 is formed in a prescribed thickness by a CVD method, this film 4 is opened at an opening part 5 and a poly silicon film 6 having a prescribed thickness is formed by a CVD method using sn emitter window having a diameter slightly larger than that of the part 5. Then, As is ion-implanted in the whole surface of the film 6 using the film 4 as a mask on the basis of a prescribed condition. At this time, the As is not implanted in the lower part of the film 4 and an emitter 7 is formed in a prescribed thickness by a heat treatment in an N2-containing atmosphere of a prescribed temperature. This emitter 7 is formed under the lower part of the part 5 as a diffusion source for the film 6.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in which the purpose is to improve the current amplification factor and withstand voltage at high speed and high density. Semiconductor devices are becoming faster and more dense. Even in bipolar transistors, the emitter size is becoming smaller year by year. In bipolar transistors, it is very important to reduce the base resistance fbb in order to increase the speed, and to achieve this, a highly doped external base is often used. Figure 5 shows an example of a transistor using a highly doped external base [Example 11]
T., Takemoto et al., “Advan
ced VIST Device Technology
y, IEDM Technical Digest (IED)
M Tech, Dig, H983pp, 51-54
). In FIG. 5, reference numeral 31 forms a collector using, for example, an n-type (111) semiconductor substrate. 32 is separated oxidation 1]
l 33 is a low concentration internal base; 7. ．． 34 is poly
Thermal oxidation air 36 forms a high concentration n' area emitter, and 437 is a high concentration external base connected to the low concentration internal base 33.

In order to reduce the base resistance rbl+, the highly doped external base 37 is formed in a self-aligned manner from the end of the emitter 36, so that the highly doped n゜ region of the emitter and the highly doped p° region of the external base are in contact with each other. The structure is as follows.

Problems to be Solved by the Invention As shown in FIG. 5, in order to reduce the base resistance rbb, the highly doped n° region of the p′ region emitter of the highly doped external base is often in contact with the emitter. If this highly doped external base is in contact with a highly doped emitter, the leakage current due to the tunneling phenomenon between the emitter and the base will increase significantly, and the reverse breakdown voltage will also decrease.

Also, the current amplification factor hpg of the transistor is emitter 36
Force exchange determined by the impurity concentration of the low concentration internal base 33 The impurity concentration increases L
The controllability of hpE becomes extremely poor. In transistors with different emitter sizes, high concentration external base 37
Due to the influence of lateral diffusion, hFE tends to decrease as the emitter size decreases. Therefore, if the emitter is made smaller in order to achieve higher density and higher speed, the effective impurity concentration of the lower concentration internal base will increase due to the effect of lateral diffusion of the higher concentration external base, resulting in a larger 11FE becoming smaller. A problem arises.

Next, the high-concentration external base 37 is formed by ion implantation from the end of the emitter 36 in a self-aligned manner.
(boron) is also implanted in the emitter region.

Therefore, a compensation effect of the high concentration n' impurity and the high concentration p' impurity is produced in the emitter region, resulting in a decrease in 1shpE and poor controllability. The present invention solves these problems.In order to increase the speed and density of transistors, the high-concentration external base is formed with sufficient strength. By preventing directional diffusion and improving leakage current and breakdown voltage between the emitter and base,
The purpose of the present invention is to provide a method for manufacturing a semiconductor device in which hFE control is determined by the impurity concentration of the emitter and the low-concentration internal base, thereby improving controllability. By eliminating the compensation effect of the n゛ disorder and the high-concentration p゛ impurity, )1 pE is increased and controllability is improved.

Means for Solving the Problem In order to solve this problem, the method of the present invention includes a step of forming a low concentration semiconductor region of the other conductivity type in a predetermined region on the semiconductor substrate of the first conductivity type; forming an insulating film on the opening, forming a conductive material larger than the opening over the opening, and forming a high concentration one conductivity type semiconductor region under the opening from the conductive material. and a step of forming a semiconductor region of the other conductivity type having a higher concentration than the end portion of the conductivity type material.

Effect: With this configuration, the force of using a highly doped external base to reduce the base resistance rbb. Therefore, the highly doped n' region of the emitter does not come into direct contact with the highly doped p' region of the extrinsic base, making it possible to reduce the leakage current between the emitter and base and increase the withstand voltage. Since the low-concentration internal base is not affected, the current amplification factor hFε can be determined only by the original emitter impurity concentration and the low-concentration internal base impurity concentration.Therefore, the base resistance rbb can be determined by using the high-concentration external base. By making it smaller, L hFE can be determined only by the impurity concentration of the emitter and low-concentration internal base, and the controllability of hpE is very good, and even if the emitter size changes, 11pE can be stably controlled.Furthermore, the emitter region It is also possible to prevent the compensation effect between the high concentration n° impurity and the high concentration p impurity.
It is possible to manufacture a semiconductor device with high speed, high density, very stable current amplification factor of 11 pt, and good controllability.

Examples Hereinafter, the examples of the present invention will be divided into Examples 1 to 3.
This will be explained based on FIGS.

(Example 1) In FIG. 1a, l is, for example, an n-type (Ill) semiconductor substrate, forming a collector. 2 is a separated oxidizing air, 3 is a low concentration internal base, and is approximately 0.0% by ion implantation method.
It is formed to a depth of 4 μm. 4 is 5102 membrane and 2
It is formed to have a thickness of 50 to 300 nm. This 5iC12 film 4 is first formed with a thickness of 30 to 100 nm by thermal oxidation, and then CV
D (Chemical Vapor Deposit
ion) method. In Figures 1 to 3,
In the figure, the thermal oxide film is omitted and only the CV D-3i (h film is shown). This is to improve the surface level at the interface and reduce the surface recombination current.

Reference numeral 5 denotes an opening in the Sight film 4, forming an emitter window. The figure shows the case where only the emitter window is opened. At the same time, the base contact and
There is no particular problem even if the collector contact is left open. 6 is made of poly-Si and is formed to a thickness of 330 nm using the CVD method. This poly SI 6 is formed 0.2 to 1.0 μm larger than the opening 5 of the emitter window. The amount of overlap needs to be optimally selected depending on the depth of the high concentration external base, which is an important point in the present invention. This point will be explained in detail later using FIG.
Ions are implanted into the poly sieve under the following conditions. At this time, the ion range R of As is small (5iOa film 4 is 250
Since the 5102 film 4 is formed to a thickness of ~300 nm, it becomes a mask for As implantation, and As is not implanted into the lower part of the 5i(h film 4, but only into the poly-Si6). The emitter 7 is formed to a depth of 0.degree. 2 .mu.m by heat treatment.

Emitter 7 uses polysi6 as a diffusion source, so
It is diffused only in the lower part of the opening 5 (FIG. 1b). In FIG. 2C, by ion-implanting B" (boron) into the entire surface, which is a feature of the present invention, a highly doped external base 8 is formed in a self-aligned manner by 0.5~0.
．． It is formed to a depth of 8 μm. B''' is 50-80
5×1014 to 2×10+6 with KeV acceleration energy
Ion implantation was performed at a dose of 7 cm2. At this time, B
Since the ion range R is small, ions are also implanted into the semiconductor substrate through the SiO2 film 4 from the end of the poly sia. On the other hand, poly siB on emitter 7
A portion of the B injected into the emitter tuff is also injected into the emitter tuff. I, % does not pass through the emitter 7 and reach the low-concentration internal base 3. Figure 4 shows an outline of the impurity concentration profile in the emitter section. shows. The horizontal axis is polys
The depth is shown with the interface between i and the semiconductor substrate as the origin,
The vertical axis indicates impurity concentration. In the figure, A is the emitter (A
s) impurity concentration '&B is the low concentration internal base (B゛)
The impurity concentration &C is the impurity concentration distribution of the high concentration external base (B), D is the impurity concentration distribution of the collector (semiconductor substrate), and the 4X point is the junction between the emitter and base. As shown in FIG. 4, the impurities in the high-concentration external base 8 do not reach the low-concentration internal base 3 through the emitter 7, although some of the impurities are implanted into the emitter 7. Therefore, the junction between the emitter and the base is approximately determined by the impurity concentration of the emitter and the low concentration internal base. However, since the poly SI 6 is formed larger than the opening 5 of the emitter window, the high concentration external base 8 is affected by the force of diffusion in the lateral direction due to heat treatment (the high concentration of the emitter 7 is
The characteristics of the present invention will be explained using FIG. 1(d). In Fig. 1d, the diffusion depth of the emitter 7 is a, the lateral diffusion amount is a', the diffusion depth of the high-concentration external base 8 is bl, the lateral diffusion amount is bl, and the overlap from the emitter window 5 to the poly si 6. quantity C
It is shown in The amount of lateral diffusion is usually calculated to be about 80% of the diffusion depth. That is, a''=0.8a,
b' = o, sb'. Therefore, in order to prevent direct contact between the high-concentration n region emitter 7 and the high-concentration external base 8, the poly-Si overlap amount C must be c>
a'+b'=0.8(a+b) (-So that this relationship is satisfied, the po from the emitter window 5
It is necessary to determine the amount of overlap of ly si 6, the depth of emitter 7, and the depth of high concentration external base 8.

For example, if the process conditions are set such that the emitter depth a = 0.2 μm and the high concentration external base depth b = 0.8 μm, the po
The overlap 1jlc of lysi is c > 0.8 (
0.2μtNO,8/JI11)=0.8μm,
The amount of overlap is required to be 0.8 μm or more. If a very shallow junction is formed, for example emitter depth a=0.
1 μm, and when the high concentration external base depth b = 0.15 μm, the overlap amount c>0.8 (0, 1 p m+0.
15 μm)=0.2 μrn, and the amount of overlap is required to be 0.2 μm or more. Therefore, it is necessary to select an optimum value for the overlap amount of poly SI from the emitter window depending on the emitter depth and the depth of the high concentration external base. Therefore, in the present invention, the high concentration oblique base 8
is a force length formed in a self-aligned manner from the end of the polysi 8. The high concentration n' region of the emitter 7 can be prevented from directly contacting it. Therefore, the leakage current between the emitter and the base can be reduced, and the withstand voltage can also be increased. Ma? , :, h
pE is not affected by lateral diffusion of high concentration external base 8,
It can be determined by the impurity concentration of the emitter 7 and the low concentration internal base 3, and by using the high concentration external base 8, it is possible to reduce rbb· and greatly improve the controllability of LhFE. After that, the base contact and the collector contact are opened (in FIGS. 1 to 3, only the base contact is shown and the collector contact is omitted), and the A1 electrode wiring 9 is connected to the 1. A bipolar transistor is completed by forming OAIm (FIG. 1e).

(Example 2) In FIG. 2a, 1 to 5 are completely the same as in Example 1 of FIG. 1, and their explanation will be omitted here. II is polysi and 330nIlI is formed by CVD method. Thereafter, a photoresist film 12 is formed 0.2 to 1.0 μm larger than the opening 5 of the emitter window, and using the photoresist film 12 as a mask, poly 5ill is dry etched using a mixed gas of C2C12F4 and SFe. Then, using the photoresist film 12 as a mask, which is a feature of the present invention, B
By ion-implanting poly-Si 1 through the SiO2 film 4, a high concentration external base 13 is formed from the end of the poly-Si 11 in a self-aligned manner to a depth of 0.5 to 0.8 .mu.m. B1 is 5 with an acceleration energy of 60 to 100 Kev
It is implanted at a dose of 10" to 2x 101570 m2. The photoresist film 12 is used as a mask to implant
The feature of this embodiment is that the pattern of ly si 11 and the high concentration external base 13 are formed in a self-aligned manner, and since the photoresist film 12 is used as a mask, poly
No Bo was injected into si 11 (Fig. 2b). In FIG. 2C (after removing the photoresist film 12, using the 5102 film 4 as a mask, 60Ke As was applied).
V, p under the conditions of 5X 10" ~ lx 10"/am2
Ion implantation into oly si 11. And 10
The emitter 14 is formed to a depth of 0.2 μm by heat treatment at 00°C. At this time, the high concentration external base 13 is also diffused at the same time. Since the emitter 14 uses poly Si II as a diffusion source, it is formed only at the bottom of the opening 5, and the high concentration external base 13 is formed in a self-aligned manner from the end of the poly Si 11, and is also diffused in the lateral direction.
Since i11 is formed larger than the opening 5, it does not diffuse into the high concentration n' region of the emitter 14. Therefore, the high concentration external base 13 does not contact the high concentration n' region of the emitter 14. The relationship between the depth of the emitter and the depth of the high concentration external base is exactly the same as in Example 1.

However, since no Bo of the high-concentration external base 13 is implanted into the L poly si 11, there is no compensation effect between the high-concentration n' impurity and the high-concentration p' impurity in the emitter region. Plate In the impurity profile shown in FIG. 4, the impurity distribution is such that B, which is a high concentration external base of C, is not implanted at all.

Therefore, even if the amount of As implanted into the emitter is reduced, 1pE can be increased, crystal defects caused by As ion implantation can be suppressed, and manufacturing costs can be reduced.

Therefore, the leakage current between the emitter and the base can be reduced, and the withstand voltage can also be increased. Moreover, hFE has a high concentration of externally based lateral diffusion and As and Bo in the emitter region.
It is possible to determine the impurity concentration of the emitter and the low-concentration internal base without being affected by the compensation effect of , making it possible to increase hFE and further improve controllability. Thereafter, a base contact and a collector contact are opened and an Al electrode wiring 15 of 1.0 μm is formed to complete a bipolar transistor (FIG. 2d).

(Example 3) In FIG. 3a, 1 to 5 are exactly the same as in FIGS. 1 and 2. 21 is made of poly-Si and is formed to a thickness of 330 nm using the CVD method. This poly Si 21 is formed 0.2 to 1.0 μm larger than the opening 5 of the emitter window.

After that, As was applied to the entire surface at 60KeV, 5x 10”~
poly si 21 under the condition of IX 1016/cm2
Emitter 2 is formed by ion implantation L1000℃ heat treatment.
2 to a depth of 0.2 μm (Fig. 3b). Third
In Figure C, the photoresist film 23 is made of polys
The high-concentration external base 24 is formed to be 0.1 to 0.3 μm smaller than the photoresist film 21 by ion implantation of Bo using the photoresist film 23 as a mask.
It is formed to a depth of 0.5 to 0.8 μm from the end of the Si 21 in a self-aligned manner. Bo is ion-implanted at an acceleration energy of 60 to 100 KeV and at a dose of 5 x 10" to 2 x 10" 7 cm2. Photoresist film 23
is used as a mask, high concentration Bo is not implanted into the emitter region 22, and the compensation effect of the high concentration n' impurity and the high concentration p' impurity does not occur in the emitter region. In addition, the high concentration external base 24 is formed in a self-aligned manner from the end of the poly Si 21, and is also diffused in the lateral direction.
Since i21 is formed larger than the opening 5, it does not diffuse in the high concentration n' region of the emitter 22. Emitter 2
Since the high concentration external base 2 and the high concentration external base 24 are formed in separate steps, process control is also easy. The relationship between the amount of overlap of the polysi 21 from the emitter window 5, the depth of the emitter, and the depth of the high concentration external base is exactly the same as in the first and second embodiments. The impurity distribution is also the same as in Example 2.

Therefore, the leakage current between the emitter and base is also small.
The pressure resistance also increases. However, LhFε is not affected by the lateral diffusion of the high concentration external base and the compensation effect of As and Bo in the emitter region, and can be determined by the impurity concentration between the emitter and the low concentration internal base, and the controllability of hpE is also very high. Get better. After that, base contact and collector
A bipolar transistor is completed by opening a contact and forming an Al electrode wiring 25 with a thickness of 1.0 μm (Fig. 3d).
.

Effects of the Invention As described above, Examples 1 to 3 have the following advantages: In a semiconductor device, especially a bipolar semiconductor device, the power of forming a highly doped external base to reduce the base resistance (by using the self-line technology, This high concentration external base is separated by 0.1 to 0.2 from the emitter and low concentration internal base.
The distance is about μm. Therefore, unlike in the prior art, the highly doped external base does not come into direct contact with the highly doped emitter, the leakage current between the emitter and the base becomes extremely small, and the withstand voltage can be greatly improved.

Also, since the high concentration external base does not diffuse into the low concentration internal base, the current amplification factor hFc can be determined by the impurity concentration of the emitter and the low concentration internal base.
E controllability is also greatly improved. Furthermore, since there is no influence of lateral diffusion of the high concentration external base, hFE can be controlled stably and uniformly even if the emitter size changes. It is possible to eliminate the compensation effect of the high-concentration p° impurity and to increase hpe even if the amount of emitter implantation is reduced.Therefore, the present invention improves the current amplification factor hFE at high speed and high density. It has made a significant contribution to the manufacturing method of semiconductor devices, and is also of great industrial value.

[Brief explanation of the drawing]

1A to 1E, 2A to 3D, and 3A to 3D are process cross-sectional plates showing the manufacturing steps of the main parts of a semiconductor device in an embodiment of the present invention. Figure 5 is a cross-sectional view of the main part of a bihole transistor using a highly doped external base. 3. Low concentration internal air alone 4. Oxidizing wind 5.
...opening plate 6,11.21...poly si
, 7, 14.22... Emikyu 8, 13.
24... High concentration external person 12.23... Name of photoresist-like agent Patent attorney Shigetaka Awano Haka 1 person 0n08 (
Father and son b) / / Tsu-shiri ν (lt)) Chi j rob, 4 o (Kotuni 12 e 4-
--β, OZ term 5 ~ - Ichito Hyakubu High 1 Ura Soto Gun N-su ~ c') Shokomi Tajiseya Decreased N9 Shunka Illusion Ochikasu ℃ 岨Q

Claims (1)

[Scope of Claims] (1) A step of forming a low concentration semiconductor region of the other conductivity type in a predetermined region on a semiconductor substrate of the one conductivity type, forming an insulating film on the low concentration semiconductor region of the other conductivity type, and forming an insulating film on the low concentration semiconductor region of the other conductivity type; forming a conductive material larger than the opening over the opening, and forming a high concentration one conductivity type semiconductor region under the opening from the conductive material; (2) forming a semiconductor region of the other conductivity type with a lower concentration in a predetermined region on the semiconductor substrate of the one conductivity type; a step of forming an insulating film on the low concentration other conductivity type semiconductor region and forming an opening;
A conductive material is formed on the entire surface, a photoresist film is formed on the opening to be larger than the opening, and the conductive material is etched using the photoresist film as a mask. 1. A method of manufacturing a semiconductor device, comprising the steps of: forming a semiconductor region of the other conductive type with a high concentration; and forming a semiconductor region of the one conductivity type with a high concentration below the opening from the conductive material. (3) forming a low concentration semiconductor region of the other conductivity type in a predetermined region on the semiconductor substrate of the one conductivity type; forming an insulating film on the low concentration semiconductor region of the other conductivity type and forming an opening; , forming a conductive material larger than the opening over the opening, and forming a high concentration one conductivity type semiconductor region under the opening from the conductive material; and forming a conductive material on the conductive material. A method for manufacturing a semiconductor device, comprising the steps of forming a smaller photoresist film and forming a semiconductor region of the other conductive type having a higher concentration than the end portion of the conductive material.