JPH02110367U - - Google Patents
Info
- Publication number
- JPH02110367U JPH02110367U JP1903489U JP1903489U JPH02110367U JP H02110367 U JPH02110367 U JP H02110367U JP 1903489 U JP1903489 U JP 1903489U JP 1903489 U JP1903489 U JP 1903489U JP H02110367 U JPH02110367 U JP H02110367U
- Authority
- JP
- Japan
- Prior art keywords
- printed
- printed alignment
- marks
- integrated circuit
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
第１図は本考案の一実施例を示す混成集積回路
の要部平面図、第２図は第１図―線断面図、
第３図は印刷位置合せマークの拡大平面図、第４
図は混成集積回路の製造プロセスを示す工程図、
第５図は従来の印刷位置合せマークを備えた混成
集積回路の要部平面図である。
１……絶縁基板、２……印刷位置合せマーク、
３……導体パターン、４……ずれ検出部、５……
ずれ検出用マーキング、６……チツプ部品、７…
…部品搭載用端子パツド、７Ａ……ダミー用端子
パツド。
Fig. 1 is a plan view of the main parts of a hybrid integrated circuit showing an embodiment of the present invention, Fig. 2 is a sectional view taken along the line of Fig. 1,
Figure 3 is an enlarged plan view of the printed alignment mark;
The figure is a process diagram showing the manufacturing process of a hybrid integrated circuit.
FIG. 5 is a plan view of a main part of a hybrid integrated circuit provided with conventional printed alignment marks. 1...Insulating board, 2...Printed alignment mark,
3... Conductor pattern, 4... Misalignment detection section, 5...
Marking for misalignment detection, 6... Chip parts, 7...
...Terminal pad for mounting parts, 7A...Terminal pad for dummy.
Claims (1)
置合せマークを近接して印刷形成してなり、この
印刷位置合せマークはダミー用端子マークを兼用
することを特徴とする混成集積回路の印刷位置合
せマークの構造。 Printed alignment of a hybrid integrated circuit, characterized in that terminal pads for mounting components and printed alignment marks are printed close to each other on an insulating substrate, and the printed alignment marks also serve as dummy terminal marks. Mark structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1903489U JPH02110367U (en) | 1989-02-21 | 1989-02-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1903489U JPH02110367U (en) | 1989-02-21 | 1989-02-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02110367U true JPH02110367U (en) | 1990-09-04 |
Family
ID=31234193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1903489U Pending JPH02110367U (en) | 1989-02-21 | 1989-02-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02110367U (en) |
-
1989
- 1989-02-21 JP JP1903489U patent/JPH02110367U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS62184775U (en) | ||
| JPH02110367U (en) | ||
| JPH0186263U (en) | ||
| JPH03117864U (en) | ||
| JPH0482880U (en) | ||
| JPS62128667U (en) | ||
| JPS61174767U (en) | ||
| JPS6196568U (en) | ||
| JPH0160571U (en) | ||
| JPS6338368U (en) | ||
| JPS6338334U (en) | ||
| JPS63114095U (en) | ||
| JPS60106363U (en) | printed wiring board | |
| JPS61100168U (en) | ||
| JPS62196377U (en) | ||
| JPH0351861U (en) | ||
| JPS6336077U (en) | ||
| JPH0170374U (en) | ||
| JPH0292936U (en) | ||
| JPS63112365U (en) | ||
| JPS63167785U (en) | ||
| JPS6327070U (en) | ||
| JPS6138943U (en) | hybrid integrated circuit | |
| JPS6255347U (en) | ||
| JPS6447074U (en) |