JPH0199250A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH0199250A
JPH0199250A JP62256945A JP25694587A JPH0199250A JP H0199250 A JPH0199250 A JP H0199250A JP 62256945 A JP62256945 A JP 62256945A JP 25694587 A JP25694587 A JP 25694587A JP H0199250 A JPH0199250 A JP H0199250A
Authority
JP
Japan
Prior art keywords
sputtering
semiconductor device
thin
temperature coefficient
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62256945A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0570306B2 (enrdf_load_stackoverflow
Inventor
Yoshihiro Tabuchi
田渕 良弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62256945A priority Critical patent/JPH0199250A/ja
Publication of JPH0199250A publication Critical patent/JPH0199250A/ja
Publication of JPH0570306B2 publication Critical patent/JPH0570306B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP62256945A 1987-10-12 1987-10-12 半導体装置の製造方法 Granted JPH0199250A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62256945A JPH0199250A (ja) 1987-10-12 1987-10-12 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62256945A JPH0199250A (ja) 1987-10-12 1987-10-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH0199250A true JPH0199250A (ja) 1989-04-18
JPH0570306B2 JPH0570306B2 (enrdf_load_stackoverflow) 1993-10-04

Family

ID=17299541

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62256945A Granted JPH0199250A (ja) 1987-10-12 1987-10-12 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH0199250A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0570306B2 (enrdf_load_stackoverflow) 1993-10-04

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