JPH0197672U - - Google Patents

Info

Publication number
JPH0197672U
JPH0197672U JP19245787U JP19245787U JPH0197672U JP H0197672 U JPH0197672 U JP H0197672U JP 19245787 U JP19245787 U JP 19245787U JP 19245787 U JP19245787 U JP 19245787U JP H0197672 U JPH0197672 U JP H0197672U
Authority
JP
Japan
Prior art keywords
signal
synchronizing
synchronizing signal
output
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19245787U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19245787U priority Critical patent/JPH0197672U/ja
Publication of JPH0197672U publication Critical patent/JPH0197672U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Television Signal Processing For Recording (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す構成図、第2
図及び第3図はその説明のための図、第4図は従
来例の構成図、第5図はその説明のための図であ
る。 1はアドレスカウンタ、2はROM、3は切換
スイツチ、4はD/A変換器、5はアンプ、11
はコンパレータ、12はオア回路、13はDフリ
ツプフロツプである。
Fig. 1 is a configuration diagram showing one embodiment of the present invention;
3 and 3 are diagrams for explaining the same, FIG. 4 is a configuration diagram of a conventional example, and FIG. 5 is a diagram for explaining the same. 1 is an address counter, 2 is a ROM, 3 is a changeover switch, 4 is a D/A converter, 5 is an amplifier, 11
is a comparator, 12 is an OR circuit, and 13 is a D flip-flop.

Claims (1)

【実用新案登録請求の範囲】 同期信号付加タイミングから同期信号を発生す
る同期信号発生手段と、 入力ビデオ信号により同期信号の終了タイミン
グを検出する検出手段と、 上記同期信号付加タイミングで一の状態となり
、上記検出手段で検出される同期信号の終了タイ
ミングまたは上記同期信号発生手段より出力され
る同期信号の終了タイミングのうちいずれか遅い
タイミング以降で他の状態となる信号を発生させ
る切換信号発生手段と、 上記入力ビデオ信号と上記同期信号発生手段の
出力信号とが供給され、上記切換信号発生手段の
出力信号が切換制御信号として供給される切換手
段とよりなり、 上記切換手段からは、上記切換信号発生手段の
出力信号が一の状態のときには上記同期信号発生
手段の出力信号が出力されると共に、他の状態の
ときには上記入力ビデオ信号が出力されるように
したことを特徴とする同期信号のすげ替え回路。
[Claims for Utility Model Registration] Synchronizing signal generating means for generating a synchronizing signal from the synchronizing signal addition timing; detecting means for detecting the end timing of the synchronizing signal from an input video signal; , switching signal generating means for generating a signal that enters another state after the later of the end timing of the synchronizing signal detected by the detecting means or the end timing of the synchronizing signal output from the synchronizing signal generating means, whichever is later; , switching means to which the input video signal and the output signal of the synchronizing signal generating means are supplied, and the output signal of the switching signal generating means being supplied as a switching control signal; A synchronization signal replacement characterized in that when the output signal of the generation means is in one state, the output signal of the synchronization signal generation means is outputted, and when the output signal of the generation means is in another state, the input video signal is outputted. circuit.
JP19245787U 1987-12-18 1987-12-18 Pending JPH0197672U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19245787U JPH0197672U (en) 1987-12-18 1987-12-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19245787U JPH0197672U (en) 1987-12-18 1987-12-18

Publications (1)

Publication Number Publication Date
JPH0197672U true JPH0197672U (en) 1989-06-29

Family

ID=31483316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19245787U Pending JPH0197672U (en) 1987-12-18 1987-12-18

Country Status (1)

Country Link
JP (1) JPH0197672U (en)

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