JPS6160585U - - Google Patents

Info

Publication number
JPS6160585U
JPS6160585U JP14615984U JP14615984U JPS6160585U JP S6160585 U JPS6160585 U JP S6160585U JP 14615984 U JP14615984 U JP 14615984U JP 14615984 U JP14615984 U JP 14615984U JP S6160585 U JPS6160585 U JP S6160585U
Authority
JP
Japan
Prior art keywords
signal
color
color difference
memory
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14615984U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14615984U priority Critical patent/JPS6160585U/ja
Priority to US06/759,972 priority patent/US4758898A/en
Priority to DE8585109593T priority patent/DE3585058D1/en
Priority to EP85109593A priority patent/EP0170267B1/en
Publication of JPS6160585U publication Critical patent/JPS6160585U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案を実施した色信号処理回路の回
路図であり、第2図はその説明図である。第3図
は従来例の回路図である。 S,S……色差信号、E,E……指示
信号、16……第1メモリ、17……第2メモリ
、23……第2スイツチ、24……制御信号発生
回路。
FIG. 1 is a circuit diagram of a color signal processing circuit embodying the present invention, and FIG. 2 is an explanatory diagram thereof. FIG. 3 is a circuit diagram of a conventional example. S1 , S2 ...Color difference signal, E1 , E2 ...Instruction signal, 16...First memory, 17...Second memory, 23...Second switch, 24...Control signal generation circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 水平同期信号を時間基準にして2つの色差
信号が一定期間に圧縮されて1Hごとに交互に挿
入されていると共に前記色差信号の種類を指示す
る指示信号を挿入されているカラー信号の前記2
つの色差信号を同時化して処理する色信号処理回
路において、第1色差信号を記憶するための第1
メモリと、第2色差信号を記憶するための第2メ
モリと、前記水平同期信号に応答して所定のタイ
ミングで高速の書込み制御信号と低速の読出し制
御信号を出力する制御信号発生手段と、前記書込
み制御信号を前記第1メモリと第2メモリに対し
択一的に供給するスイツチと、前記カラー信号中
の指示信号に応じて前記スイツチの切換えを制御
する手段とを備えることを特徴とする色信号処理
回路。 (2) 前記第1色差信号はR−Y信号であり、第
2色差信号はB−Y信号であることを特徴とする
実用新案登録請求の範囲第1項記載の色信号処理
回路。
[Claims for Utility Model Registration] (1) Two color difference signals are compressed into a certain period using a horizontal synchronization signal as a time reference and are inserted alternately every 1H, and an instruction signal indicating the type of the color difference signals. Said 2 of the color signals are inserted
In a color signal processing circuit that simultaneously processes two color difference signals, a first
a second memory for storing a second color difference signal; a control signal generating means for outputting a high-speed write control signal and a low-speed read control signal at predetermined timing in response to the horizontal synchronization signal; A color device comprising: a switch that selectively supplies a write control signal to the first memory and the second memory; and means for controlling switching of the switch in accordance with an instruction signal in the color signal. signal processing circuit. (2) The color signal processing circuit according to claim 1, wherein the first color difference signal is a R-Y signal, and the second color difference signal is a B-Y signal.
JP14615984U 1984-07-30 1984-09-27 Pending JPS6160585U (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP14615984U JPS6160585U (en) 1984-09-27 1984-09-27
US06/759,972 US4758898A (en) 1984-07-30 1985-07-29 Video signal recording and reproducing apparatus
DE8585109593T DE3585058D1 (en) 1984-07-30 1985-07-30 DEVICE FOR RECORDING AND PLAYING BACK VIDEO SIGNALS.
EP85109593A EP0170267B1 (en) 1984-07-30 1985-07-30 Video signal recording and reproducing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14615984U JPS6160585U (en) 1984-09-27 1984-09-27

Publications (1)

Publication Number Publication Date
JPS6160585U true JPS6160585U (en) 1986-04-23

Family

ID=30704398

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14615984U Pending JPS6160585U (en) 1984-07-30 1984-09-27

Country Status (1)

Country Link
JP (1) JPS6160585U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60102084A (en) * 1983-11-08 1985-06-06 Sharp Corp Time flex system time axis correcting type video tape recorder
JPS60196090A (en) * 1984-03-17 1985-10-04 Sony Corp Chrominance signal discriminator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60102084A (en) * 1983-11-08 1985-06-06 Sharp Corp Time flex system time axis correcting type video tape recorder
JPS60196090A (en) * 1984-03-17 1985-10-04 Sony Corp Chrominance signal discriminator

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