JPS6320684U - - Google Patents
Info
- Publication number
- JPS6320684U JPS6320684U JP11392686U JP11392686U JPS6320684U JP S6320684 U JPS6320684 U JP S6320684U JP 11392686 U JP11392686 U JP 11392686U JP 11392686 U JP11392686 U JP 11392686U JP S6320684 U JPS6320684 U JP S6320684U
- Authority
- JP
- Japan
- Prior art keywords
- output
- input
- memory
- signal
- switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Television Systems (AREA)
Description
第１図は本考案に関わるビデオ信号方式変換装
置の一実施例を示す回路図、第２図は従来例の回
路図である。
１……メモリー、３……書込みタイミング回路
、５……読出しタイミング回路、７……入力切換
回路、９……出力切換回路、１１……切換タイミ
ング回路。
FIG. 1 is a circuit diagram showing an embodiment of a video signal format conversion device according to the present invention, and FIG. 2 is a circuit diagram of a conventional example. 1...Memory, 3...Write timing circuit, 5...Read timing circuit, 7...Input switching circuit, 9...Output switching circuit, 11...Switching timing circuit.
Claims (1)
リーと、メモリーの入力側と出力側に接続され入
力信号と出力信号とを切り換える入力切換回路及
び出力切換回路と、メモリーに入力同期信号に基
づく書き込み信号を送る書込みタイミング回路と
、メモリーに出力同期信号に基づく読み出し信号
を送る読出しタイミング回路と、入力切換回路と
出力切換回路とに出力同期信号に基づく切換信号
を送る切換タイミング回路とから構成されたこと
を特徴とするビデオ信号方式変換装置。 A memory that writes and reads video signals, an input switching circuit and an output switching circuit that are connected to the input and output sides of the memory to switch between input and output signals, and a writing device that sends a write signal to the memory based on an input synchronization signal. A timing circuit, a readout timing circuit that sends a readout signal based on an output synchronization signal to the memory, and a switching timing circuit that sends a switching signal based on the output synchronization signal to the input switching circuit and the output switching circuit. video signal format conversion device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11392686U JPS6320684U (en) | 1986-07-24 | 1986-07-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11392686U JPS6320684U (en) | 1986-07-24 | 1986-07-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6320684U true JPS6320684U (en) | 1988-02-10 |
Family
ID=30996187
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11392686U Pending JPS6320684U (en) | 1986-07-24 | 1986-07-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6320684U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5943674A (en) * | 1982-09-03 | 1984-03-10 | Nippon Gakki Seizo Kk | Video format converting circuit |
-
1986
- 1986-07-24 JP JP11392686U patent/JPS6320684U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5943674A (en) * | 1982-09-03 | 1984-03-10 | Nippon Gakki Seizo Kk | Video format converting circuit |
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