JPH0156580B2 - - Google Patents

Info

Publication number
JPH0156580B2
JPH0156580B2 JP54045582A JP4558279A JPH0156580B2 JP H0156580 B2 JPH0156580 B2 JP H0156580B2 JP 54045582 A JP54045582 A JP 54045582A JP 4558279 A JP4558279 A JP 4558279A JP H0156580 B2 JPH0156580 B2 JP H0156580B2
Authority
JP
Japan
Prior art keywords
frequency
output
controlled oscillator
oscillation
voltage controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54045582A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55136732A (en
Inventor
Tooru Akyama
Tsutomu Oogishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP4558279A priority Critical patent/JPS55136732A/ja
Publication of JPS55136732A publication Critical patent/JPS55136732A/ja
Publication of JPH0156580B2 publication Critical patent/JPH0156580B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Superheterodyne Receivers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP4558279A 1979-04-13 1979-04-13 Receiver of frequency synthesizer system Granted JPS55136732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4558279A JPS55136732A (en) 1979-04-13 1979-04-13 Receiver of frequency synthesizer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4558279A JPS55136732A (en) 1979-04-13 1979-04-13 Receiver of frequency synthesizer system

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP7574189A Division JPH01280930A (ja) 1989-03-27 1989-03-27 周波数シンセサイザー方式受信機

Publications (2)

Publication Number Publication Date
JPS55136732A JPS55136732A (en) 1980-10-24
JPH0156580B2 true JPH0156580B2 (pt) 1989-11-30

Family

ID=12723333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4558279A Granted JPS55136732A (en) 1979-04-13 1979-04-13 Receiver of frequency synthesizer system

Country Status (1)

Country Link
JP (1) JPS55136732A (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5996945U (ja) * 1982-12-21 1984-06-30 アンリツ株式会社 高c/n高周波信号発生器
JPH0681510B2 (ja) * 1983-09-28 1994-10-12 三菱電機株式会社 同期式pwmインバータの基準信号作成回路
JPH0681509B2 (ja) * 1983-09-28 1994-10-12 三菱電機株式会社 同期式pwmインバータの基準信号作成回路
JPS63179627A (ja) * 1987-01-21 1988-07-23 Yaesu Musen Co Ltd 無線通信機

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5358A (en) * 1976-06-24 1978-01-05 Yaesu Musen Kk Fast responding pll oscillating circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5358A (en) * 1976-06-24 1978-01-05 Yaesu Musen Kk Fast responding pll oscillating circuit

Also Published As

Publication number Publication date
JPS55136732A (en) 1980-10-24

Similar Documents

Publication Publication Date Title
JP2729028B2 (ja) Fm搬送波の復調方法および復調回路
US4355413A (en) Phase locked loop circuit
EP0557867A2 (en) Double phase locked loop circuit
JPH0156580B2 (pt)
JPS588617B2 (ja) ジユシンキ
JPS6221418B2 (pt)
JPS6119184B2 (pt)
JPS5925410B2 (ja) 受信機
JPS6157740B2 (pt)
JP2810580B2 (ja) Pll検波回路
JPS6131647B2 (pt)
JP2944019B2 (ja) Aft回路およびこれを用いた電子同調チューナ
JPS59191921A (ja) チユ−ナにおける発振周波数制御回路
JPH0459808B2 (pt)
JPS5846586Y2 (ja) 位相同期ル−プを有する回路
US5459431A (en) Frequency/phase analog detector and its use in a phase-locked loop
JPH01280930A (ja) 周波数シンセサイザー方式受信機
JPS5818345Y2 (ja) 受信機
JPS6253081B2 (pt)
JPS60245319A (ja) シンセサイザ方式のfm受信装置
JPH1013228A (ja) 位相同期発振回路
JPH055207B2 (pt)
JPS6339129B2 (pt)
JPS5825730A (ja) ス−パヘテロダイン回路の構成
JPS61111016A (ja) Pll周波数シンセサイザ方式tv受像機