JPH0156580B2 - - Google Patents
Info
- Publication number
- JPH0156580B2 JPH0156580B2 JP54045582A JP4558279A JPH0156580B2 JP H0156580 B2 JPH0156580 B2 JP H0156580B2 JP 54045582 A JP54045582 A JP 54045582A JP 4558279 A JP4558279 A JP 4558279A JP H0156580 B2 JPH0156580 B2 JP H0156580B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output
- controlled oscillator
- oscillation
- voltage controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4558279A JPS55136732A (en) | 1979-04-13 | 1979-04-13 | Receiver of frequency synthesizer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4558279A JPS55136732A (en) | 1979-04-13 | 1979-04-13 | Receiver of frequency synthesizer system |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7574189A Division JPH01280930A (ja) | 1989-03-27 | 1989-03-27 | 周波数シンセサイザー方式受信機 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55136732A JPS55136732A (en) | 1980-10-24 |
| JPH0156580B2 true JPH0156580B2 (en:Method) | 1989-11-30 |
Family
ID=12723333
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4558279A Granted JPS55136732A (en) | 1979-04-13 | 1979-04-13 | Receiver of frequency synthesizer system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55136732A (en:Method) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5996945U (ja) * | 1982-12-21 | 1984-06-30 | アンリツ株式会社 | 高c/n高周波信号発生器 |
| JPH0681510B2 (ja) * | 1983-09-28 | 1994-10-12 | 三菱電機株式会社 | 同期式pwmインバータの基準信号作成回路 |
| JPH0681509B2 (ja) * | 1983-09-28 | 1994-10-12 | 三菱電機株式会社 | 同期式pwmインバータの基準信号作成回路 |
| JPS63179627A (ja) * | 1987-01-21 | 1988-07-23 | Yaesu Musen Co Ltd | 無線通信機 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5358A (en) * | 1976-06-24 | 1978-01-05 | Yaesu Musen Kk | Fast responding pll oscillating circuit |
-
1979
- 1979-04-13 JP JP4558279A patent/JPS55136732A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55136732A (en) | 1980-10-24 |
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